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AD7545 Datasheet(PDF) 5 Page - Intersil Corporation

Part # AD7545
Description  12-Bit, Buffered, Multiplying CMOS DAC
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

AD7545 Datasheet(HTML) 5 Page - Intersil Corporation

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5
problem, if it occurs, is to retime the write pulse (WR) so that
it only occurs when data is valid.
Another cause of digital glitches is capacitive coupling from the
digital lines to the OUT1 and AGND terminals. This should be
minimized by isolating the analog pins of the AD7545 (pins 1, 2,
19, 20) from the digital pins by a ground track run between pins
2 and 3 and between pins 18 and 19 of the AD7545. Note how
the analog pins are at one end of the package and separated
from the digital pins by VDD and DGND to aid isolation at the
board level. On-chip capacitive coupling can also give rise to
crosstalk from the digital to analog sections of the AD7545,
particularly in circuits with high currents and fast rise and fall
times. This type of crosstalk is minimized by using VDD =+5V.
However, great care should be taken to ensure that the +5V
used to power the AD7545 is free from digitally induced noise.
Temperature Coefficients
The gain temperature coefficient of the AD7545 has a
maximum value of 5ppm/oC and a typical value of 2ppm/oC.
This corresponds to worst case gain shifts of 2 LSBs and
0.8 LSBs respectively over a 100oC temperature range.
When trim resistors R1 and R2 are used to adjust full scale
range, the temperature coefficient of R1 and R2 should also
be taken into account.
Basic Applications
Figures 5 and 6 show simple unipolar and bipolar circuits
using the AD7545. Resistor R1 is used to trim for full scale.
Capacitor C1 provides phase compensation and helps
prevent overshoot and ringing when using high speed op
amps. Note that the circuits of Figures 5 and 6 have constant
input impedance at the VREF terminal.
The circuit of Figure 5 can either be used as a fixed reference
D/A converter so that it provides an analog output voltage in the
range 0V to -VIN (note the inversion introduced by the op amp)
or VIN can be an AC signal in which case the circuit behaves as
an attenuator (2-Quadrant Multiplier). VIN can be any voltage in
the range -20V
≤ VIN ≤ +20V (provided the op amp can handle
such voltages) since VREF is permitted to exceed VDD. Table 2
shows the code relationship for the circuit of Figure 5.
Figure 6 and Table 3 illustrate the recommended circuit and
code relationship for bipolar operation. The D/A function itself
uses offset binary code and inverter U1 on the MSB line
converts 2’s complement input code to offset binary code. If
appropriate, inversion of the MSB may be done in software
using an exclusive -OR instruction and the inverter omitted. R3,
R4 and R5 must be selected to match within 0.01% and they
should be the same type of resistor (preferably wire-wound or
metal foil), so that their temperature coefficients match.
Mismatch of R3 value to R4 causes both offset and full scale
error. Mismatch of R5 to R4 and R3 causes full scale error.
The choice of the operational amplifiers in Figure 5 and
Figure 6 depends on the application and the trade off
between required precision and speed. Below is a list of
operational amplifiers which are good candidates for many
applications. The main selection criteria for these
operational amplifiers is to have low VOS ,low VOS drift, low
bias current and low settling time.
These amplifiers need to maintain the low nonlinearity and
monotonic operation of the D/A while providing enough
speed for maximum converter performance.
Operational Amplifiers
HA-5127 Ultra Low Noise, Precision
HA-5137 Ultra Low Noise, Precision, Wide Band
HA-5147 Ultra Low Noise, Precision, High Slew Rate
HA-5170 Precision, JFET Input
TABLE 1. RECOMMENDED TRIM RESISTOR VALUES vs
GRADES FOR VDD =+5V
TRIM RESISTOR
J
K
R1
500
200
R2
150
68
TABLE 2. UNIPOLAR BINARY CODE TABLE FOR CIRCUIT
OF FIGURE 5
BINARY NUMBER IN DAC
REGISTER
ANALOG OUTPUT
1111
1111
1111
1000
0000
0000
0000
0000
0001
0000
0000
0000
0V
TABLE 3. 2’S COMPLEMENT CODE TABLE FOR CIRCUIT OF
FIGURE 6
DATA INPUT
ANALOG OUTPUT
0111
1111
1111
0000
0000
0001
0000
0000
0000
0V
1111
1111
1111
1000
0000
0000
V
IN
4095
4096
-------------



V
IN
2048
4096
-------------



1
2
--- VIN
=
V
IN
1
4096
-------------



+V
IN
2047
2048
-------------



+V
IN
1
2048
-------------



V
IN
1
2048
-------------



V
IN
2048
2048
-------------



AD7545


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