EtronTech

4Mx32 DDR SDRAM

EM6A9320BI

7

Rev 0.9C

May 2006

Mode Register Set (MRS)

The mode register is divided into various fields depending on functionality.

•

Burst Length Field (A2, A1, A0)

This field specifies the data length of column access and selects the Burst Length.

•

Addressing Mode Select Field (A3)

The Addressing Mode can be Interleave Mode or Sequential Mode. Both Sequential Mode and

Interleave Mode support burst length of 2, 4 and 8. Full page burst length is only for Sequential mode.

•

CAS# Latency Field (A6, A5, A4)

This field specifies the number of clock cycles from the assertion of the Read command to the first

read data. The minimum whole value of CAS# Latency depends on the frequency of CK. The

minimum whole value satisfying the following formula must be programmed into this field.

•

Test Mode field :A7; DLL Reset Mode field : A8

These two bits must be programmed to "00" in normal operation.

•

( BA0, BA1)

Mode Resistor Bitmap

BA1

BA0

A11

A10

A9

A8

A7

A6

A5

A4

A3

A2

A1

A0

0

Mode RFU must be set to “0” DLL

(1)

TM

CAS Latency

BT

Burst Lenght

BA0

Register Mode

A8

A7

Mode

A3

Type

0

MRS

0

0

Normal

0

Sequential

1

EMRS

1

0

Reset DLL

1

Interleave

0

1

Test Mode

A6

A5

A4

CAS Latency

A2

A1

A0

Burst Length

0

1

0

2 clocks

0

0

1

2

0

1

1

3 clocks

0

1

0

4

1

0

0

4 clocks

0

1

1

8

1

0

1

Reserved

1

1

1

Full Page (Sequential)

1

1

0

2.5 clocks

All other Reserved

All other Reserved

Burst Definition, Addressing Sequence of Sequential and Interleave Mode

Start Address

Burst Length

A2

A1

A0

Sequential

Interleave

X

X

0

0, 1

0, 1

2

X

X

1

1, 0

1, 0

X

0

0

0, 1, 2, 3

0, 1, 2, 3

X

0

1

1, 2, 3, 0

1, 0, 3, 2

X

1

0

2, 3, 0, 1

2, 3, 0, 1

4

X

1

1

3, 0, 1, 2

3, 2, 1, 0

0

0

0

0, 1, 2, 3, 4, 5, 6, 7

0, 1, 2, 3, 4, 5, 6, 7

0

0

1

1, 2, 3, 4, 5, 6, 7, 0

1, 0, 3, 2, 5, 4, 7, 6

0

1

0

2, 3, 4, 5, 6, 7, 0, 1

2, 3, 0, 1, 6, 7, 4, 5

0

1

1

3, 4, 5, 6, 7, 0, 1, 2

3, 2, 1, 0, 7, 6, 5, 4

1

0

0

4, 5, 6, 7, 0, 1, 2, 3

4, 5, 6, 7, 0, 1, 2, 3

1

0

1

5, 6, 7, 0, 1, 2, 3, 4

5, 4, 7, 6, 1, 0, 3, 2

1

1

0

6, 7, 0, 1, 2, 3, 4, 5

6, 7, 4, 5, 2, 3, 0, 1

8

1

1

1

7, 0, 1, 2, 3, 4, 5, 6

7, 6, 5, 4, 3, 2, 1, 0

Note :

1. DLL must be resetted whenever changing the operation frequency.