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AM29LV001BT-5EC Datasheet(PDF) 3 Page - Advanced Micro Devices |
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AM29LV001BT-5EC Datasheet(HTML) 3 Page - Advanced Micro Devices |
3 / 43 page DATA SHEET This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. Publication# 21557 Rev: F Amendment: 4 Issue Date: May 5, 2006 Am29LV001B 1 Megabit (128 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS ■ Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors ■ Manufactured on 0.32 µm process technology ■ High performance — Full voltage range: access times as fast as 55 ns — Regulated voltage range: access times as fast as 45 ns ■ Ultra low power consumption (typical values at 5 MHz) — 200 nA Automatic Sleep mode current — 200 nA standby mode current — 7 mA read current — 15 mA program/erase current ■ Flexible sector architecture — One 8 Kbyte, two 4 Kbyte, and seven 16 Kbyte — Supports full chip erase — Sector Protection features: Hardware method of locking a sector to prevent any program or erase operations within that sector Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors ■ Unlock Bypass Mode Program Command — Reduces overall programming time when issuing multiple program command sequences ■ Top or bottom boot block configurations available ■ Embedded Algorithms — Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors — Embedded Program algorithm automatically writes and verifies data at specified addresses ■ Minimum 1 million erase cycle guarantee per sector ■ 20 Year data retention at 125°C — Reliable operation for the life of the system ■ Package option — 32-pin TSOP — 32-pin PLCC ■ Compatibility with JEDEC standards — Pinout and software compatible with single- power supply Flash — Superior inadvertent write protection ■ Data# Polling and toggle bits — Provides a software method of detecting program or erase operation completion ■ Erase Suspend/Erase Resume — Supports reading data from or programming data to a sector that is not being erased ■ Hardware reset pin (RESET#) — Hardware method for resetting the device to reading array data This product has been retired and is not recommended for designs. Please contact your Spansion representative for alternates. Availability of this document is retained for reference and historical purposes only. |
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