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AM29BL802CB-90RZE Datasheet(PDF) 5 Page - Advanced Micro Devices |
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AM29BL802CB-90RZE Datasheet(HTML) 5 Page - Advanced Micro Devices |
5 / 46 page November 3, 2006 22371C7 Am29BL802C 3 D A TA SH EET TABLE OF CONTENTS This page left intentionally blank. . . . . . . . . . . . . 2 Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 8 Table 1. Device Bus Operations .......................................................8 Requirements for Reading Array Data Array in Asynchronous (Non-Burst) Mode ..................................................................... 9 Requirements for Reading Array Data in Synchronous (Burst) Mode ............................................................................. 9 Burst Suspend/Burst Resume Operations ................................ 9 IND# End of Burst Indicator .................................................... 10 Writing Commands/Command Sequences ............................ 10 Program and Erase Operation Status .................................... 10 Standby Mode ........................................................................ 10 Automatic Sleep Mode ........................................................... 10 RESET#: Hardware Reset Pin ............................................... 10 Output Disable Mode .............................................................. 11 Table 2. Sector Address Table ........................................................11 Autoselect Mode..................................................................... 12 Table 3. Am29BL802C Autoselect Codes (High Voltage Method) ..12 Sector Protection/Unprotection ............................................... 12 Figure 1. In-system Sector Protect/Unprotect Algorithms ............... 13 Temporary Sector Unprotect .................................................. 14 Figure 2. Temporary Sector Unprotect Operation........................... 14 Hardware Data Protection . . . . . . . . . . . . . . . . . . 14 Low VCC Write Inhibit .............................................................. 14 Write Pulse “Glitch” Protection ............................................... 14 Logical Inhibit .......................................................................... 14 Power-Up Write Inhibit ............................................................ 14 Command Definitions . . . . . . . . . . . . . . . . . . . . . 14 Reading Array Data in Non-burst Mode ................................. 14 Reading Array Data in Burst Mode ......................................... 15 Figure 3. Burst Mode Read with 40 MHz CLK, 65 ns tIACC, 18 ns tBACC Parameters.................................................................. 15 Figure 4. Burst Mode Read with 25 MHz CLK, 70 ns tIACC, 24 ns tBACC Parameters................................................................. 16 Reset Command ..................................................................... 16 Autoselect Command Sequence ............................................ 16 Program Command Sequence ............................................... 16 Unlock Bypass Command Sequence ..................................... 17 Figure 5. Program Operation .......................................................... 17 Chip Erase Command Sequence ........................................... 17 Sector Erase Command Sequence ........................................ 18 Figure 6. Erase Operation............................................................... 18 Erase Suspend/Erase Resume Commands ........................... 18 Asynchronous Mode ............................................................... 18 Burst Mode ............................................................................. 19 General ................................................................................... 19 Command Definitions ............................................................. 20 Table 4. Am29BL802C Command Definitions ................................20 Write Operation Status . . . . . . . . . . . . . . . . . . . . 21 DQ7: Data# Polling ................................................................. 21 Figure 7. Data# Polling Algorithm .................................................. 21 RY/BY#: Ready/Busy# ............................................................ 22 DQ6: Toggle Bit I .................................................................... 22 DQ2: Toggle Bit II ................................................................... 22 Reading Toggle Bits DQ6/DQ2 ............................................... 22 DQ5: Exceeded Timing Limits ................................................ 23 DQ3: Sector Erase Timer ....................................................... 23 Figure 8. Toggle Bit Algorithm........................................................ 23 Table 5. Write Operation Status ..................................................... 24 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 25 Figure 9. Maximum Negative Overshoot Waveform ...................... 25 Figure 10. Maximum Positive Overshoot Waveform...................... 25 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 25 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 11. ICC1 Current vs. Time (Showing Active and Automatic Sleep Currents) .............................................................................. 27 Figure 12. Typical ICC1 vs. Frequency ........................................... 27 Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 13. Test Setup..................................................................... 28 Table 6. Test Specifications ........................................................... 28 Key to Switching Waveforms .................................................. 28 Figure 14. Input Waveforms and Measurement Levels ................. 28 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 15. Conventional Read Operations Timings ....................... 31 Figure 16. Burst Mode Read .......................................................... 31 Figure 17. RESET# Timings .......................................................... 32 Figure 18. Program Operation Timings.......................................... 34 Figure 19. Chip/Sector Erase Operation Timings .......................... 35 Figure 20. Data# Polling Timings (During Embedded Algorithms). 36 Figure 21. Toggle Bit Timings (During Embedded Algorithms)...... 36 Figure 22. DQ2 vs. DQ6 for Erase and Erase Suspend Operations .................................................................... 37 Figure 23. Temporary Sector Unprotect Timing Diagram .............. 37 Figure 24. Sector Protect/Unprotect Timing Diagram .................... 38 Figure 25. Alternate CE# Controlled Write Operation Timings ...... 40 Erase and Programming Performance . . . . . . . . 41 Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 41 SSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 41 Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Physical Dimensions*. . . . . . . . . . . . . . . . . . . . . . 42 SSO056—56-Pin Shrink Small Outline Package .................... 42 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 43 Revision A (June 1, 1999) ...................................................... 43 Revision A+1 (June 25, 1999) ................................................ 43 Revision B (November 29, 1999) ............................................ 43 Revision C (June 20, 2000) .................................................... 43 Revision C+1 (November 16, 2000) ....................................... 43 Revision C+2 (July 22, 2002) ................................................. 43 Revision C+3 (November 22, 2002) ....................................... 43 Revision C+4 (June 4, 2004) .................................................. 44 Revision C+5 (February 28, 2005) ......................................... 44 Revision C+6 (June 29, 2005) ................................................ 44 Revision C7 (November 3, 2006) ........................................... 44 |
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