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AM29F800BB-120SK Datasheet(PDF) 5 Page - Advanced Micro Devices |
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AM29F800BB-120SK Datasheet(HTML) 5 Page - Advanced Micro Devices |
5 / 44 page November 2, 2006 21504E5 Am29F800B 3 D A TA SH EE T TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5 Special Handling Instructions for FBGA Package .................... 6 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9 Table 1. Am29F800B Device Bus Operations ..................................9 Word/Byte Configuration .......................................................... 9 Requirements for Reading Array Data ..................................... 9 Writing Commands/Command Sequences .............................. 9 Program and Erase Operation Status .................................... 10 Standby Mode ........................................................................ 10 RESET#: Hardware Reset Pin ............................................... 10 Output Disable Mode .............................................................. 10 Table 2. Am29F800BT Top Boot Block Sector Address Table .......11 Table 3. Am29F800BB Bottom Boot Block Sector Address Table ..12 Autoselect Mode ..................................................................... 12 Table 4. Am29F800B Autoselect Codes (High Voltage Method) ....13 Sector Protection/Unprotection ............................................... 13 Temporary Sector Unprotect .................................................. 13 Figure 1. Temporary Sector Unprotect Operation........................... 13 Hardware Data Protection ...................................................... 14 Command Definitions . . . . . . . . . . . . . . . . . . . . . . 14 Reading Array Data ................................................................ 14 Reset Command ..................................................................... 14 Autoselect Command Sequence ............................................ 15 Word/Byte Program Command Sequence ............................. 15 Figure 2. Program Operation .......................................................... 15 Chip Erase Command Sequence ........................................... 15 Sector Erase Command Sequence ........................................ 16 Erase Suspend/Erase Resume Commands ........................... 16 Figure 3. Erase Operation............................................................... 17 Command Definitions ............................................................. 18 Table 5. Am29F800B Command Definitions ...................................18 Write Operation Status . . . . . . . . . . . . . . . . . . . . . 19 DQ7: Data# Polling ................................................................. 19 Figure 4. Data# Polling Algorithm ................................................... 19 RY/BY#: Ready/Busy# ........................................................... 20 DQ6: Toggle Bit I .................................................................... 20 DQ2: Toggle Bit II ................................................................... 20 Reading Toggle Bits DQ6/DQ2 .............................................. 20 DQ5: Exceeded Timing Limits ................................................ 21 DQ3: Sector Erase Timer ....................................................... 21 Figure 5. Toggle Bit Algorithm......................................................... 21 Table 6. Write Operation Status ......................................................22 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 23 Figure 6. Maximum Negative Overshoot Waveform ....................... 23 Figure 7. Maximum Positive Overshoot Waveform......................... 23 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 23 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 24 TTL/NMOS Compatible .......................................................... 24 CMOS Compatible .................................................................. 25 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 8. Test Setup....................................................................... 26 Table 7. Test Specifications ........................................................... 26 Key to Switching Waveforms. . . . . . . . . . . . . . . . 26 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 27 Read Operations .................................................................... 27 Figure 9. Read Operations Timings ............................................... 27 Hardware Reset (RESET#) .................................................... 28 Figure 10. RESET# Timings .......................................................... 28 Word/Byte Configuration (BYTE#) ........................................ 29 Figure 11. BYTE# Timings for Read Operations............................ 29 Figure 12. BYTE# Timings for Write Operations............................ 29 Erase/Program Operations ..................................................... 30 Figure 13. Program Operation Timings.......................................... 31 Figure 14. Chip/Sector Erase Operation Timings .......................... 32 Figure 15. Data# Polling Timings (During Embedded Algorithms). 33 Figure 16. Toggle Bit Timings (During Embedded Algorithms)...... 33 Figure 17. DQ2 vs. DQ6................................................................. 34 Temporary Sector Unprotect .................................................. 34 Figure 18. Temporary Sector Unprotect Timing Diagram .............. 34 Figure 19. Alternate CE# Controlled Write Operation Timings ...... 36 Erase and Programming Performance . . . . . . . 37 Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 37 TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 37 Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 38 SO 044—44-Pin Small Outline Package ................................ 38 TS 048—48-Pin Standard Pinout Thin Small Outline Package (TSOP) ........................................................ 39 FBB048—48-Ball Fine-Pitch Ball Grid Array (FBGA) 6 x 9 mm package .................................................................................. 40 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 41 Revision A (August 1997) ....................................................... 41 Revision B (October 1997) ..................................................... 41 Revision C (January 1998) ..................................................... 41 Revision C+1 (April 1998) ....................................................... 41 Revision C+2 (April 1998) ....................................................... 41 Revision D (January 1999) ..................................................... 42 Revision D+1 (March 23, 1999) .............................................. 42 Revision D+2 (July 2, 1999) ................................................... 42 Revision E (November 16, 1999) ............................................ 42 Revision E+1 (August 4, 2000) ............................................... 42 Revision E+2 (June 4, 2004) .................................................. 42 Revision E3 (December 22, 2005) .......................................... 42 Revision E4 (May 19, 2006) ................................................... 42 Revision E5 (November 2, 2006) ............................................ 42 |
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