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M38022M7D384SP Datasheet(PDF) 9 Page - Mitsubishi Electric Semiconductor

Part # M38022M7D384SP
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M38022M7D384SP Datasheet(HTML) 9 Page - Mitsubishi Electric Semiconductor

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3802 GROUP USER’S MANUAL
i
List of figures
List of figures
CHAPTER 1 HARDWARE
Fig. 1 Pin configuration of M38022M4-XXXFP ..........................................................................1-2
Fig. 2 Pin configuration of M38022M4-XXXSP ..........................................................................1-3
Fig. 3 Functional block diagram ................................................................................................... 1-4
Fig. 4 Part numbering .................................................................................................................... 1-6
Fig. 5 Memory expansion plan ..................................................................................................... 1-7
Fig. 6 Memory expansion plan (Extended operating temperature version) .......................... 1-8
Fig. 7 740 Family CPU register structure ................................................................................... 1-9
Fig. 8 Register push and pop at interrupt generation and subroutine call ........................ 1-10
Fig. 9 Structure of CPU mode register ..................................................................................... 1-11
Fig. 10 Memory map diagram .................................................................................................... 1-12
Fig. 11 Memory map of special function register (SFR) ....................................................... 1-13
Fig. 12 Port block diagram (single-chip mode) (1) ................................................................ 1-16
Fig. 13 Port block diagram (single-chip mode) (2) ................................................................ 1-17
Fig. 14 Interrupt control ............................................................................................................... 1-18
Fig. 15 Structure of interrupt-related registers ........................................................................ 1-18
Fig. 16 Structure of timer XY register ....................................................................................... 1-19
Fig. 17 Block diagram of timer X, timer Y, timer 1, and timer 2 ........................................ 1-21
Fig. 18 Block diagram of clock synchronous serial I/O1....................................................... 1-22
Fig. 19 Operation of clock synchronous serial I/O1 function ............................................... 1-22
Fig. 20 Block diagram of UART serial I/O .............................................................................. 1-23
Fig. 21 Operation of UART serial I/O function ....................................................................... 1-24
Fig. 22 Structure of serial I/O control registers ...................................................................... 1-25
Fig. 23 Structure of serial I/O2 control register...................................................................... 1-26
Fig. 24 Block diagram of serial I/O2 function ......................................................................... 1-26
Fig. 25 Timing of serial I/O2 function ....................................................................................... 1-27
Fig. 26 Timing of PWM cycle ..................................................................................................... 1-28
Fig. 27 Block diagram of PWM function ................................................................................... 1-28
Fig. 28 Structure of PWM control register ............................................................................... 1-29
Fig. 29 PWM output timing when PWM register or PWM prescaler is changed ............... 1-29
Fig. 30 Structure of AD/DA control register ............................................................................ 1-30
Fig. 31 Block diagram of A-D converter ................................................................................... 1-30
Fig. 32 Block diagram of D-A converter ................................................................................... 1-31
Fig. 33 Equivalent connection circuit of D-A converter ......................................................... 1-31
Fig. 34 Example of reset circuit ................................................................................................. 1-32
Fig. 35 Internal status of microcomputer after reset ............................................................. 1-32
Fig. 36 Timing of reset ................................................................................................................ 1-33
Fig. 37 Ceramic resonator circuit ............................................................................................... 1-34
Fig. 38 External clock input circuit ............................................................................................ 1-34
Fig. 39 Block diagram of clock generating circuit .................................................................................. 1-34
Fig. 40 Memory maps in various processor modes ............................................................... 1-35
Fig. 41 Structure of CPU mode register ................................................................................... 1-35
Fig. 42 ONW function timing ...................................................................................................... 1-36
Fig. 43 Programming and testing of One Time PROM version ........................................... 1-38
Fig. 44 Timing chart after an interrupt occurs ........................................................................ 1-40
Fig. 45 Time up to execution of the interrupt processing routine ....................................... 1-40
Fig. 46 A-D conversion equivalent circuit ................................................................................. 1-42
Fig. 47 A-D conversion timing chart .......................................................................................... 1-42


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