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A800DB15UD Datasheet(PDF) 5 Page - Advanced Micro Devices |
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A800DB15UD Datasheet(HTML) 5 Page - Advanced Micro Devices |
5 / 46 page D A TA SH EE T January 23, 2007 27546A6 Am29SL800D 3 TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5 Special Handling Instructions for FBGA Packages .................. 5 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7 Standard Products .................................................................... 7 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 8 Table 1. Am29SL800D Device Bus Operations ................................8 Word/Byte Configuration .......................................................... 8 Requirements for Reading Array Data ..................................... 8 Writing Commands/Command Sequences .............................. 8 Program and Erase Operation Status ...................................... 9 Standby Mode .......................................................................... 9 Automatic Sleep Mode ............................................................. 9 RESET#: Hardware Reset Pin ................................................. 9 Output Disable Mode .............................................................. 10 Table 2. Am29SL800DT Top Boot Block Sector Address Table .....10 Table 3. Am29SL800DB Bottom Boot Block Sector Address Table 11 Autoselect Mode ..................................................................... 12 Table 4. Am29SL800D Autoselect Code (High Voltage Method) ...12 Sector Protection/Unprotection ............................................... 12 Temporary Sector Unprotect .................................................. 12 Figure 1. In-System Sector Protect/Unprotect Algorithms .............. 13 Figure 2. Temporary Sector Unprotect Operation........................... 14 Hardware Data Protection ...................................................... 14 Command Definitions . . . . . . . . . . . . . . . . . . . . . 14 Reading Array Data ................................................................ 14 Reset Command ..................................................................... 14 Autoselect Command Sequence ............................................ 15 Word/Byte Program Command Sequence ............................. 15 Figure 3. Program Operation .......................................................... 16 Chip Erase Command Sequence ........................................... 16 Sector Erase Command Sequence ........................................ 16 Erase Suspend/Erase Resume Commands ........................... 17 Figure 4. Erase Operation............................................................... 18 Table 5. Am29SL800D Command Definitions ................................19 Write Operation Status . . . . . . . . . . . . . . . . . . . . . 20 DQ7: Data# Polling ................................................................. 20 Figure 5. Data# Polling Algorithm ................................................... 20 RY/BY#: Ready/Busy# ........................................................... 21 DQ6: Toggle Bit I .................................................................... 21 DQ2: Toggle Bit II ................................................................... 21 Reading Toggle Bits DQ6/DQ2 .............................................. 21 Figure 6. Toggle Bit Algorithm......................................................... 22 DQ5: Exceeded Timing Limits ................................................ 22 DQ3: Sector Erase Timer ....................................................... 22 Table 6. Write Operation Status ..................................................... 23 Absolute Maximum Ratings . . . . . . . . . . . . . . . . 24 Figure 7. Maximum Negative Overshoot Waveform ...................... 24 Figure 8. Maximum Positive Overshoot Waveform........................ 24 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 24 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 7. CMOS Compatible ........................................................... 25 Zero Power Flash ................................................................... 26 Figure 9. ICC1 Current vs. Time (Showing Active and Automatic Sleep Currents) .............................................................................. 26 Figure 10. Typical ICC1 vs. Frequency ........................................... 26 Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 11. Test Setup..................................................................... 27 Table 8. Test Specifications ........................................................... 27 Table 9. Key to Switching Waveforms ........................................... 27 Figure 12. Input Waveforms and Measurement Levels ................. 27 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 10. Read Operations ............................................................ 28 Figure 13. Read Operations Timings ............................................. 28 Table 11. Hardware Reset (RESET#) ............................................ 29 Figure 14. RESET# Timings .......................................................... 29 Table 12. Word/Byte Configuration (BYTE#) ................................. 30 Figure 15. BYTE# Timings for Read Operations............................ 30 Figure 16. BYTE# Timings for Write Operations............................ 30 Table 13. Erase/Program Operations ............................................ 31 Figure 17. Program Operation Timings.......................................... 32 Figure 18. Chip/Sector Erase Operation Timings .......................... 33 Figure 19. Data# Polling Timings (During Embedded Algorithms). 34 Figure 20. Toggle Bit Timings (During Embedded Algorithms)...... 34 Figure 21. DQ2 vs. DQ6................................................................. 35 Table 14. Temporary Sector Unprotect .......................................... 35 Figure 22. Temporary Sector Unprotect Timing Diagram .............. 35 Figure 23. Sector Protect/Unprotect Timing Diagram .................... 36 Table 15. Alternate CE# Controlled Erase/Program Operations .... 37 Figure 24. Alternate CE# Controlled Write Operation Timings ...... 38 Erase and Programming Performance . . . . . . . 39 Table 16. Erase and Programming Performance ........................... 39 Table 17. Latchup Characteristics .................................................. 39 Table 18. TSOP Pin Capacitance .................................................. 39 Table 19. Data Retention ............................................................... 39 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 40 TS 048—48-Pin Standard TSOP ............................................ 40 FBA048—48-Ball Fine-Pitch Ball Grid Array (FBGA) 8.15 X 6.15 mm Package ....................................................... 41 FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA) 9 x 8 mm Package .................................................................. 42 VBK048—48 Ball Fine-Pitch Ball Grid Array (FBGA) ............. 43 8.15 x 6.15 mm ....................................................................... 43 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 44 |
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