5

Functional Pin Description

VSEN (Pin 1)

This pin is connected to the converters output voltage. The

PGOOD and OVP comparator circuits use this signal to

report output voltage status and for overvoltage protection.

OCSET (Pin 2)

the converter over-current (OC) trip point according to the

following equation:

An over-current trip cycles the soft-start function.

SS (Pin 3)

Connect a capacitor from this pin to ground. This capacitor,

along with an internal 10

µA current source, sets the soft-

start interval of the converter.

VID0-4 (Pins 4-8)

VID0-4 are the input pins to the 5-bit DAC. The states of

these five pins program the internal voltage reference

(DACOUT). The level of DACOUT sets the converter output

voltage. It also sets the PGOOD and OVP thresholds. Table

1 specifies DACOUT for the 32 combinations of DAC inputs.

COMP (Pin 9) and FB (Pin 10)

COMP and FB are the available external pins of the error

amplifier. The FB pin is the inverting input of the error

amplifier and the COMP pin is the error amplifier output.

These pins are used to compensate the voltage-control

feedback loop of the converter.

GND (Pin 11)

Signal ground for the IC. All voltage levels are measured

with respect to this pin.

PGOOD (Pin 12)

PGOOD is an open collector output used to indicate the

status of the converter output voltage. This pin is pulled low

when the converter output is not within

±10% of the

DACOUT reference voltage.

PHASE (Pin 13)

Connect the PHASE pin to the upper MOSFET source. This

pin is used to monitor the voltage drop across the MOSFET

for over-current protection. This pin also provides the return

path for the upper gate drive.

UGATE (Pin 14)

Connect UGATE to the upper MOSFET gate. This pin

provides the gate drive for the upper MOSFET.

BOOT (Pin 15)

This pin provides bias voltage to the upper MOSFET driver.

A bootstrap circuit may be used to create a BOOT voltage

suitable to drive a standard N-Channel MOSFET.

PGND (Pin 16)

This is the power ground connection. Tie the lower MOSFET

source to this pin.

LGATE (Pin 17)

Connect LGATE to the lower MOSFET gate. This pin

provides the gate drive for the lower MOSFET.

VCC (Pin 18)

Provide a 12V bias supply for the chip to this pin.

OVP (Pin 19)

The OVP pin can be used to drive an external SCR in the

event of an overvoltage condition. Output rising 15% more

than the DAC-set voltage triggers a high output on this pin

and disables PWM gate drive circuitry.

RT (Pin 20)

This pin provides oscillator switching frequency adjustment.

200kHz switching frequency is increased according to the

following equation:

to VCC reduces the switching frequency according to the

following equation:

11

12

13

14

15

16

17

18

20

19

10

9

8

7

6

5

4

3

2

1

VSEN

OCSET

SS

VID0

VID1

VID2

VID4

VID3

COMP

FB

RT

VCC

LGATE

PGND

OVP

BOOT

UGATE

PHASE

PGOOD

GND

I

PEAK

I

OCS

R

OCSET

•

r

DS ON

()

--------------------------------------------

=

Fs

200kHz

510

6

•

R

()

---------------------

+

≈

Fs

200 kHz

410

7

•

R

()

---------------------

–

≈

HIP6004A