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HIP6502 Datasheet(PDF) 1 Page - Intersil Corporation

Part # HIP6502
Description  Multiple Linear Power Controller with ACPI Control Interface
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HIP6502 Datasheet(HTML) 1 Page - Intersil Corporation

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4-1
®
HIP6502
Multiple Linear Power Controller
with ACPI Control Interface
The HIP6502 complements either an HIP6020 or an
HIP6021 in ACPI-compliant designs for microprocessor and
computer applications. The IC integrates four linear
controllers/regulators, switching, monitoring and control
functions into a 20-pin SOIC package. One linear controller
generates the 3.3VDUAL/3.3VSB voltage plane from the ATX
supply’s 5VSB output, powering the south bridge and the
PCI slots through an external pass transistor during sleep
states (S3, S4/S5). A second transistor is used to switch in
the ATX 3.3V output for operation during S0 and S1/S2
(active) operating states. Two linear controllers/regulators
supply a choice of either or both of the computer system’s
2.5V or 3.3V memory power through external pass
transistors in active states. During sleep states, integrated
pass transistors supply the sleep power. Another controller
powers up the 5VDUAL plane by switching in the ATX 5V
output in active states, and the ATX 5VSB in sleep states.
One internal regulator outputs a dedicated, noise-free 2.5V
clock chip supply. The HIP6502’s operating mode (active
outputs or sleep outputs) is selectable through two digital
control pins, S3 and S5. Enabling sleep state support on the
5VDUAL output is offered through the EN5VDL pin. In active
state, the 3.3VDUAL and 3.3VMEM linear regulators use
external N-channel pass MOSFETs to connect the outputs
directly to the 3.3V input supplied by an ATX (or equivalent)
power supply, for minimal losses. In sleep state, power
delivery on both outputs is transferred to NPN transistors -
external to the controller on the 3.3VDUAL, internal on the
3.3VMEM. Active state regulation on the 2.5VMEM output is
performed through an external NPN transistor. In sleep
state, conduction on this output is transferred to an internal
pass transistor. The 5VDUAL output is powered through two
external MOS transistors. In sleep states, a PMOS (or PNP)
transistor conducts the current from the ATX 5VSB output;
while in active state, current flow is transferred to an NMOS
transistor connected to the ATX 5V output. The operation of
the 5VDUAL output is dictated not only by the status of the
S3 and S5 pins, but that of the EN5VDL pin as well. The
3.3VDUAL/3.3VSB output is active for as long as the ATX
5VSB voltage is applied to the chip. The 2.5VCLK output is
only active during S0 and S1/S2, and uses the 3V3 pin as
input source for its internal pass element.
Features
• Provides 5 ACPI-Controlled Voltages
-5VDUAL USB/Keyboard/Mouse (Active/Sleep)
-3.3VDUAL/3.3VSB PCI/Auxiliary/LAN (Active/Sleep)
-2.5VMEM RDRAM (Active/Sleep)
-3.3VMEM SDRAM (Active/Sleep)
-2.5VCLK Clock/Processor Terminations (Active Only)
• Excellent Output Voltage Regulation
-3.3VDUAL/3.3VSB Output: ±2.0% Over Temperature;
Sleep State Only
-2.5VMEM and 3.3VMEM Output: ±2.0% Over
Temperature; Both Operational States (3.3VMEM in
sleep only)
-2.5VCLK Output: ±2.0% Over Temperature
• Small Size
- Very Low External Component Count
• Dual Memory Voltage Support Via MSEL Pin
- 2.5V for RDRAM Memory
- 3.3V for SDRAM Memory
- Both 2.5V and 3.3V for Flexible Systems
• Under-Voltage Monitoring of All Outputs with Centralized
FAULT Reporting and Temperature Shutdown
Applications
• Motherboard Power Regulation for ACPI-Compliant
Computers
Pinout
HIP6502
(SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
HIP6502CB
0 to 70
20 Ld SOIC
M20.3
HIP6502EVAL1
Evaluation Board
14
15
16
17
18
19
20
7
6
5
4
3
2
1
5VSB
VSEN1
VCLK
3V3DLSB
3V3DL
VSEN2
MSEL
5V
5VDLSB
12V
DLA
SS
3V3
DRV2
EN5VDL
5VDL
13
8
11
12
10
9
S3
S5
FAULT
GND
Data Sheet
July 2000
File Number 4775.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
NOT
RECO
MME
NDED
FOR
NEW
DESI
GNS
POSS
IBLE
SUBS
TITU
TE P
ROD
UCT
INTE
RSIL
HIP6
502B
or co
ntact
our T
echn
ical S
uppo
rt Ce
nter a
t
1-888
-INTE
RSIL
or ww
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ersil.
com/
tsc


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