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ISL6552CRZ Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL6552CRZ Datasheet(HTML) 11 Page - Intersil Corporation |
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11 / 18 page  11 destructive ringing of the capacitors and output inductors. If the conditions that caused the over-voltage still persist, the PWM outputs will be cycled between three state and VCORE clamped to ground, as a hysteretic shunt regulator. Under-Voltage The VSEN pin also detects when the CORE voltage falls more than 10% below the VID programmed level. This causes PGOOD to go low, but has no other effect on operation and is not latched. There is also hysteresis in this detection point. Over-Current In the event of an over-current condition, the over-current protection circuit reduces the RMS current delivered to 41% of the current limit. When an over-current condition is detected, the controller forces all PWM outputs into a three state mode. This condition results in the gate driver removing drive to the output stages. The ISL6552 goes into a wait delay timing cycle that is equal to the Soft-Start ramp time. PGOOD also goes “low” during this time due to VSEN going below its threshold voltage. To lower the average output dissipation, the Soft-Start initial wait time is increased from 32 to 2048 cycles, then the Soft-Start ramp is initiated. At a PWM frequency of 200kHz, for instance, an over-current detection would cause a dead time of 10.24ms, then a ramp of 10.08ms. At the end of the delay, PWM outputs are restarted and the soft start ramp is initiated. If a short is present at that time, the cycle is repeated. This is the hiccup mode. Figure 6 shows the supply shorted under operation and the hiccup operating mode described above. Note that due to the high short circuit current, over-current is detected before completion of the start-up sequence so the delay is not quite as long as the normal Soft-Start cycle. CORE Voltage Programming The voltage identification pins (VID0, VID1, VID3, and VID25mV) set the CORE output voltage. Each VID pin is pulled to VCC by an internal 20 µA current source and accepts open-collector/open-drain/open-switch-to-ground or standard low-voltage TTL or CMOS signals. Table 1 shows the nominal DAC voltage as a function of the VID codes. The power supply system is ±1% accurate over the operating temperature and voltage range. PGOOD SHORT 50A/DIV CURRENT ATX SUPPLY ACTIVATED BY ATX “PS-ON PIN” SUPPLY FREQUENCY = 200kHz, V IN = 12V HICCUP MODE. SUPPLY POWERED BY ATX SUPPLY CORE LOAD CURRENT = 31A, 5V LOAD = 5A SHORT APPLIED HERE FIGURE 6. SHORT APPLIED TO SUPPLY AFTER POWER-UP TABLE 1. VOLTAGE IDENTIFICATION CODES VOLTAGE IDENTIFICATION CODE AT PROCESSOR PINS VCCCORE (VDC) VID25mV VID3 VID2 VID1 VID0 00 1 0 0 1.05 1 0 1 0 0 1.075 00 0 1 1 1.10 1 0 0 1 1 1.125 00 0 1 0 1.15 1 0 0 1 0 1.175 00 0 0 1 1.20 1 0 0 0 1 1.225 00 0 0 0 1.25 1 0 0 0 0 1.275 01 1 1 1 1.30 1 1 1 1 1 1.325 01 1 1 0 1.35 1 1 1 1 0 1.375 01 1 0 1 1.40 1 1 1 0 1 1.425 01 1 0 0 1.45 1 1 1 0 0 1.475 01 0 1 1 1.50 1 1 0 1 1 1.525 01 0 1 0 1.55 1 1 0 1 0 1.575 01 0 0 1 1.60 1 1 0 0 1 1.625 01 0 0 0 1.65 1 1 0 0 0 1.675 00 1 1 1 1.70 1 0 1 1 1 1.725 00 1 1 0 1.75 1 0 1 1 0 1.775 00 1 0 1 1.80 1 0 1 0 1 1.825 ISL6552 |
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