11

FN7307.6

October 30, 2006

Where:

•

θ

The maximum power dissipation actually produced by an IC

is the total quiescent supply current times the total power

supply voltage, plus the power in the IC due to the load, or:

Where:

•

application

• i = Number of channels

overheat.

Power Supply Bypassing and Printed Circuit

Board Layout

As with any high frequency device, a good printed circuit

board layout is necessary for optimum performance. Lead

lengths should be as sort as possible. The power supply pin

must be well bypassed to reduce the risk of oscillation. For

connected to the ground plane, a single 4.7µF tantalum

to GND will suffice. This same capacitor combination should

be placed at each supply pin to ground if split supplies are to

supply rail.

For good AC performance, parasitic capacitance should be

kept to minimum. Use of wire wound resistors should be

avoided because of their additional series inductance. Use

of sockets should also be avoided if possible. Sockets add

parasitic inductance and capacitance that can result in

compromised performance. Minimizing parasitic capacitance

at the amplifier's inverting input pin is very important. The

feedback resistor should be placed very close to the

inverting input pin. Strip line design techniques are

recommended for the signal traces.

Typical Applications

FIGURE 25. TWISTED PAIR CABLE RECEIVER

PD

i

------------

×

+

×

⎝⎠

⎜⎟

⎛⎞

×

=

FBP

IN+

IN-

REF

FBN

IN+

IN-

REF

EL5172/

EL5372

EL5171/

EL5371

50

50

TWISTED PAIR

EL5171, EL5371