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P80CL410HFP Datasheet(PDF) 8 Page - NXP Semiconductors

Part # P80CL410HFP
Description  Low voltage 8-bit microcontrollers with I2C-bus
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P80CL410HFP Datasheet(HTML) 8 Page - NXP Semiconductors

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1997 Apr 10
8
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
I2C-bus
P80CL410; P83CL410
7.2
Pin description
Table 1
Pin description for DIP40 (SOT190-1), VSO40 (SOT319-2) and QFP44 (SOT307-2) packages
For more extensive description of the port pins see Chapter 10 “I/O facilities”.
SYMBOL
PIN
DESCRIPTION
DIP40
VSO40
QFP44
P1.0/INT2
1
40
• Port 1: 8-bit bidirectional I/O port (P1.0 to P1.7). Port pins that have
logic 1s written to them are pulled HIGH by internal pull-ups, and in this
state can be used as inputs. As inputs, Port 1 pins that are externally
pulled LOW will source current (IIL, see Chapter 20) due to the internal
pull-ups. Port 1 output buffers can sink/source 4 LS TTL loads.
• Alternative functions:
– INT2 to INT9 are external interrupt inputs
– SCL and SDA are the I2C-bus clock and data lines.
P1.1/INT3
2
41
P1.2/INT4
3
42
P1.3/INT5
4
43
P1.4/INT6
5
44
P1.5/INT7
6
1
P1.6/INT8/SCL
7
2
P1.7/INT9/SDA
8
3
RST
9
4
Reset: a HIGH level on this pin for two machine cycles while the oscillator
is running resets the device.
P3.0
10
5
• Port 3: 8-bit bidirectional I/O port (P3.0 to P3.7).
Same characteristics as Port 1.
• Alternative functions:
– INT0 and INT1 are external interrupts 0 and 1
– T0 and T1 are external inputs for timers 0 and 1
– WR is the external Data Memory write strobe
– RD is the external Data Memory read strobe.
P3.1
11
7
P3.2/INT0
12
8
P3.3/INT1
13
9
P3.4/T0
14
10
P3.5/T1
15
11
P3.6/WR
16
12
P3.7/RD
17
13
XTAL2
18
14
Crystal oscillator output: output of the inverting amplifier of the oscillator.
Left open when external clock is used.
XTAL1
19
15
Crystal oscillator input: input to the inverting amplifier of the oscillator,
also the input for an externally generated clock source.
VSS
20
16
Ground: circuit ground potential.
P2.0 to P2.7
A8 to A15
21 to 28
18 to 25
• Port 2: 8-bit bidirectional I/O port (P2.0 to P2.7) with internal pull-ups.
Same characteristics as Port 1.
• High-order addressing: Port 2 emits the high-order address byte
(A8 to A15) during accesses to external memory that use 16-bit
addresses (MOVX @DPTR). In this application it uses the strong internal
pull-ups when emitting logic 1s. During accesses to external memory that
use 8-bit addresses (MOVX @Ri), Port 2 emits the contents of the P2
Special Function Register.
PSEN
29
26
Program Store Enable. Output read strobe to external Program Memory.
When executing code out of external Program Memory, PSEN is activated
twice each machine cycle. However, during each access to external Data
Memory two PSEN activations are skipped.


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