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ISL88705 Datasheet(PDF) 5 Page - Intersil Corporation |
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ISL88705 Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 14 page 5 FN8092.3 December 6, 2006 Absolute Maximum Ratings Thermal Information Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Voltage on any Pin with Respect to GND . . . . . . . . . . . -1.0V to +7V DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C Recommended Operating Conditions Temperature Range (Industrial) . . . . . . . . . . . . . . . . .-40°C to +85°C Thermal Resistance (Typical, Note 3) θJA (°C/W) PDIP Package* (4-layer test board) . . . . . . . . . . . . . 83 SOIC Package (4-layer test board) . . . . . . . . . . . . . 110 *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification are not implied. For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. NOTE: 3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Over the recommended operating conditions unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VDD Supply Voltage Range 2.0 5.5 V IDD VDD = 5V, WDT Inactive 10 19 µA VDD = 3V, WDT Inactive 8 10 µA ILI Input Leakage Current (PFI) 100 nA ILO Output Leakage Current 100 nA VOLTAGE THRESHOLDS VTH1 Fixed VDD Voltage Trip Point 4.556 4.640 4.724 V 4.301 4.380 4.459 V 3.034 3.090 3.146 V 2.867 2.920 2.973 V 2.583 2.630 2.677 V VTH1HYST Hysteresis at VTH1 Input Temperature = +25°C VTH1 = 4.64V 46 mV VTH1 = 4.38V 44 mV VTH1 = 3.09V 37 mV VTH1 = 2.92V 29 mV VTH1 = 2.63V 31 mV RST AND RST VOL Reset Output Voltage Low VDD ≥ 3.3V, Sinking 2.5mA 0.05 0.40 V VDD < 3.3V, Sinking 1.5mA 0.05 0.40 V VOH RST Output Voltage High VDD ≥ 3.3V, Sourcing 2.5mA VDD-0.6 VDD-0.4 V VDD < 3.3V, Sourcing 1.5mA VDD-0.6 VDD-0.4 V RST Output Voltage High VDD ≥ 3.3V, Sourcing 0.8mA VDD-0.6 VDD-0.4 V VDD < 3.3V, Sourcing 0.5mA VDD-0.6 VDD-0.4 V tRPD VTH to Reset Asserted Delay 45 µs tPOR POR Time-Out Delay CPOR is open 140 200 260 ms CLOAD Load Capacitance on Reset Pins 5 pF ISL88705, ISL88706, ISL88707, ISL88708, 8SL88716, ISL88813 |
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