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X40030S14I-B Datasheet(PDF) 5 Page - Intersil Corporation

Part # X40030S14I-B
Description  Triple Voltage Monitor with Integrated CPU Supervisor
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X40030S14I-B Datasheet(HTML) 5 Page - Intersil Corporation

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5
FN8114.1
May 25, 2006
A manual reset input provides debounce circuitry for
minimum reset component count.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the WDO signal.
The user selects the interval from three preset values.
Once selected, the interval does not change, even
after cycling the power.
*Voltage monitor requires VCC to operate. Others are independent of VCC
PIN CONFIGURATION
Device
Expected System
Voltages
Vtrip1
(V)
Vtrip2
(V)
Vtrip3
(V)
POR
(system)
X40030, X40031
-A
-B
-C
5V; 3V or 3.3V; 1.8V
5V; 3V; 1.8V
3.3V; 2.5V; 1.8V
2.0-4.75*
4.55-4.65*
4.35-4.45*
2.95-3.05*
1.70-4.75
2.85-2.95
2.55-2.65
2.15-2.25
1.70-4.75
1.65-1.75
1.65-1.75
1.65-1.75
RESET = X40030
RESET = X40031
X40034, X40035
-A
-B
-C
5V; 3.3V; 1.5V
5V; 3V or 3.3V; 1.5V
5V; 3V or 3.3V; 1.2V
2.0-4.75*
4.55-4.65*
4.55-4.65*
4.55-4.65*
0.90-3.50
1.25-1.35
1.25-1.35
0.95-1.05
1.70-4.75
3.05-3.15
2.85-2.95
2.85-2.95
RESET = X40030
RESET = X40031
V3MON
VSS
VCC
SDA
SCL
3
2
4
1
12
13
11
14
LOWLINE
NC
RESET
7
6
5
8
9
10
V2MON
MR
WP
3
2
4
1
12
13
11
14
7
6
5
8
9
10
V3FAIL
WDO
V2FAIL
V3MON
VCC
SDA
SCL
WP
V3FAIL
WDO
VSS
LOWLINE
NC
RESET
V2MON
MR
V2FAIL
X40030, X40034
X40031, X40035
14-Pin SOIC, TSSOP
14-Pin SOIC, TSSOP
PIN DESCRIPTION
Pin
Name
Function
1V2FAIL
V2 Voltage Fail Output. This open drain output goes LOW when V2MON is less than VTRIP2 and
goes HIGH when V2MON exceeds VTRIP2. There is no power up reset delay circuitry on this pin.
2V2MON
V2 Voltage Monitor Input. When the V2MON input is less than the VTRIP2 voltage, V2FAIL goes
LOW. This input can monitor an unregulated power supply with an external resistor divider or can
monitor a second power supply with no external components. Connect V2MON to VSS or VCC when
not used. The V2MON comparator is supplied by V2MON (X40030, X40031) or by the VCC input
(X40034, X40035).
3LOWLINE
Early Low VCC Detect. This CMOS output signal goes LOW when VCC < VTRIP1 and goes high
when
VCC > VTRIP1.
4
NC
No connect.
5MR
Manual Reset Input. Pulling the MR pin LOW initiates a system reset. The RESET/RESET pin will
remain HIGH/LOW until the pin is released and for the tPURST thereafter.
6
RESET/
RESET
RESET Output. (X40031, X40035) This open drain pin is an active LOW output which goes LOW
whenever VCC falls below VTRIP1 voltage or if manual reset is asserted. This output stays active
for the programmed time period (tPURST) on power up. It will also stay active until manual reset is
released and for tPURST thereafter.
RESET Output. (X40030, X40034) This pin is an active HIGH CMOS output which goes HIGH
whenever VCC falls below VTRIP1 voltage or if manual reset is asserted. This output stays active
for the programmed time period (tPURST) on power up. It will also stay active until manual reset is
released and for tPURST thereafter.
X40030, X40031, X40034, X40035


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