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IRS2540SPBF Datasheet(PDF) 7 Page - International Rectifier |
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IRS2540SPBF Datasheet(HTML) 7 Page - International Rectifier |
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7 / 14 page  IRS254(0,1)(S)PbF www.irf.com Page 7 Functional Description Operating Mode The IRS254(0,1) operates as a time-delayed hysteritic buck controller. During normal operating conditions the output current is regulated via the IFB pin voltage (nominal value of 500 mV). This feedback is compared to an internal high precision bandgap voltage reference. An on-board dV/dt filter has also been used to ignore erroneous transitioning. Once the supply to the IC reaches VCCUV+, the LO output is held high and the HO output low for a predetermined period of time. This initiates charging of the bootstrap capacitor, establishing the VBS floating supply for the high-side output. The IC then begins toggling HO and LO outputs as needed to regulate the current. Fig.1 IRS254(0,1) Control Signals, Iavg=1.2 A As long as VIFB is below VIFBTH, HO is on, modulated by the watchdog timer described below, the load is receiving current from VBUS, which simultaneously stores energy in the inductor, as VIFB increases, unless the load is open. Once VIFB crosses VIFBTH, the control loop switches HO off after the delay tHO,OFF. Once HO is off, LO will turn on after the deadtime (DT), the inductor releases the stored energy into the load and VIFB starts decreasing. When VIFB crosses VIFBTH again, the control loop switches HO on after the delay tHO,ON and LO off after the delay tHO,ON + DT. The switching continues to regulate the current at an average value determined as follows. When the inductance value is large enough to maintain a low ripple on IFB, Iout,avg can be calculated: RCS VIFBTH avg Iout = ) ( (A) (B) Fig.2 (A) Storing Energy in Inductor (B) Releasing Inductor Stored Energy t_LO_on t_HO_off DT1 IFBTH 50% 50% 50% 50% t_LO_off DT2 t_HO_on HO LO IFB 50% Fig.3 IRS254(0,1) Time Delayed Hysterisis The control method is based upon a free running frequency, in constrast to a more widely used fixed frequency regulation. This reduces the part count since there is no need for frequency setting components and also provides an inherently stable sytem, which acts as a current source. A deadtime of approximately 140 ns between the two gate drive signals is necessary to prevent a “shoot-through” condition. At higher frequencies, the switching losses become very large in the absence of this deadtime. The deadtime has been adjusted to maintain precise current regulation, while still preventing shoot-through. HO LO Iout |
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Similar Description - IRS2540SPBF |
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