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X9251TS24I Datasheet(PDF) 1 Page - Intersil Corporation

Part # X9251TS24I
Description  Quad Digitally-Controlled (XDCP?? Potentiometer
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X9251TS24I Datasheet(HTML) 1 Page - Intersil Corporation

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1
®
FN8166.5
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9251
Single Supply/Low Power/256-Tap/SPI Bus
Quad Digitally-Controlled (XDCP™)
Potentiometer
The X9251 integrates four digitally controlled potentio-
meters (XDCP) on a monolithic CMOS integrated circuit.
The digitally controlled potentiometers are imple-mented
with a combination of resistor elements and CMOS switches.
The position of the wipers are controlled by the user through
the SPI bus interface. Each potentiometer has associated
with it a volatile Wiper Counter Register (WCR) and four
non-volatile Data Registers that can be directly written to and
read by the user. The content of the WCR controls the
position of the wiper. At power-up, the device recalls the
content of the default Data Registers of each DCP (DR00,
DR10, DR20, and DR30) to the corresponding WCR.
The XDCP can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Features
• Four potentiometers in one package
• 256 resistor taps–0.4% resolution
• SPI Serial Interface for write, read, and transfer operations
of the potentiometer
• Wiper resistance: 100
Ω typical @ VCC = 5V
• 4 Non-volatile data registers for each
potentiometer
• Non-volatile storage of multiple wiper positions
• Standby current <5µA max
•VCC: 2.7V to 5.5V Operation
•50k
Ω, 100kΩ versions of total resistance
• 100 year data retention
• Single supply version of X9250
• Endurance: 100,000 data changes per bit per register
• 24 Ld SOIC, 24 Ld TSSOP
• Low power CMOS
• Pb-free plus anneal available (RoHS compliant)
Functional Diagram
POWER UP,
INTERFACE
CONTROL
AND
VCC
VSS
SPI
RH0
RL0
DCP0
RW0
A1
SO
SI
CS
HOLD
SCK
WP
WCR0
DR00
DR01
DR02
DR03
RH1
RL1
DCP1
RW1
WCR1
DR10
DR11
DR12
DR13
RH2
RL2
DCP2
RW2
WCR2
DR20
DR21
DR22
DR23
RH3
RL3
DCP3
RW3
WCR3
DR30
DR31
DR32
DR33
A0
Interface
STATUS
Data Sheet
April 13, 2007


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