6

FN8166.5

April 13, 2007

Serial Interface

The X9251 supports the SPI interface hardware conventions.

The device is accessed via the SI input with data clocked in,

on the rising SCK. CS must be LOW and the HOLD and WP

pins must be HIGH during the entire operation.

The SO and SI pins can be connected together, since they

have three state outputs. This can help to reduce system pin

count.

Identification Byte

The first byte sent to the X9251 from the host, following a CS

going HIGH to LOW, is called the Identification Byte. The

most significant four bits of the Identification Byte are a

Device Type Identifier, ID[3:0]. For the X9251, this is fixed as

0101 (refer to Table 3).

The least significant four bits of the Identification Byte are the

Slave Address bits, AD[3:0]. For the X9251, A3 is 0, A2 is 0,

A1 is the logic value at the input pin A1, and A0 is the logic

value at the input pin A0. Only the device which Slave

Address matches the incoming bits sent by the master

executes the instruction. The A1 and A0 inputs can be actively

Instruction Byte

The next byte sent to the X9251 contains the instruction and

register pointer information. The four most significant bits are

used provide the instruction opcode (I[3:0]). The RB and RA

bits point to one of the four Data Registers of each associated

XDCP. The least two significant bits point to one of four Wiper

Counter Registers or DCPs.The format is shown below in

Table 4.

TABLE 3. IDENTIFICATION BYTE FORMAT

TABLE 4. INSTRUCTION BYTE FORMAT

TABLE 1. WIPER COUNTER REGISTER, WCR (8-bit), WCR[7:0]: USED TO STORE THE CURRENT WIPER POSITION (VOLATILE)

WCR7

WCR6

WCR5

WCR4

WCR3

WCR2

WCR1

WCR0

(MSB)

(LSB)

TABLE 2. DATA REGISTER, DR (8-bit), DR[7:0]: USED TO STORE WIPER POSITIONS OR DATA (NON-VOLATILE)

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0

(MSB)

(LSB)

ID3

ID2

ID1

ID0

A3

A2

A1

A0

01

0100

Pin A1

Logic Value

Pin A0

Logic Value

(MSB)

(LSB)

Device Type

Identifier

Slave Address

I3

I2

I1

I0

RB

RA

P1

P0

(MSB)

(LSB)

Instruction

Register

DCP Selection

Opcode

Selection

(WCR Selection)

Data Register Selection

REGISTER

RB

RA

DR#0

0

0

DR#1

0

1

DR#2

1

0

DR#3

1

1

#: 0, 1, 2, or 3

X9251