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X9251UV24IZ-2.7 Datasheet(PDF) 8 Page - Intersil Corporation |
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X9251UV24IZ-2.7 Datasheet(HTML) 8 Page - Intersil Corporation |
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8 / 20 page  8 FN8166.5 April 13, 2007 Increment/Decrement Command The final command is Increment/Decrement (See Figures 6 and 7). The Increment/Decrement command is different from the other commands. Once the command is issued and the X9251 has responded with an Acknowledge, the master can clock the selected wiper up and/or down in one segment steps; thereby, providing a fine tuning capability to the host. For each SCK clock pulse (tHIGH) while SI is HIGH, the selected wiper moves one wiper position towards the RH terminal. Similarly, for each SCK clock pulse while SI is LOW, the selected wiper moves one wiper position towards the RL terminal. A detailed illustration of the sequence and timing for this operation are shown. See Instruction format for more details. ID3 ID2 ID1 ID0 0 A1 A0 I3 I2 I1 RB RA P0 SCK SI CS 0101 DEVICE ID INTERNAL INSTRUCTION OPCODE ADDRESS REGISTER 0 I0 P1 ADDRESS DCP/WCR ADDRESS 0 0 FIGURE 2. TWO-BYTE INSTRUCTION SEQUENCE 01 0 1 A1 A0 I3 I2 I1 I0 RB RA P0 SCK SI D7 D6 D5 D4 D3 D2 D1 D0 CS 00 ID3 ID2 ID1 ID0 DEVICE ID INTERNAL INSTRUCTION OPCODE ADDRESS REGISTER ADDRESS DCP/WCR ADDRESS 00 P1 DATA FOR WCR[7:0] OR DR[7:0] FIGURE 3. THREE-BYTE INSTRUCTION SEQUENCE SPI INTERFACE; WRITE CASE 01 0 1 A1 A0 I3 I2 I1 I0 RB RA P0 SCK SI D7 D6 D5 D4 D3 D2 D1 D0 CS 00 ID3 ID2 ID1 ID0 DEVICE ID INTERNAL INSTRUCTION OPCODE ADDRESS REGISTER ADDRESS DCP/WCR ADDRESS 00 P1 WCR[7:0] S0 X X X XX XX X DON’T CARE OR DATA REGISTER BIT [7:0] FIGURE 4. THREE-BYTE INSTRUCTION SEQUENCE SPI INTERFACE, READ CASE X9251 |
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