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X9409WV24IZ-2.7 Datasheet(PDF) 3 Page - Intersil Corporation |
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X9409WV24IZ-2.7 Datasheet(HTML) 3 Page - Intersil Corporation |
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3 / 20 page  3 FN8192.4 October 12, 2006 PIN CONFIGURATION PRINCIPLES OF OPERATION The X9409 is a highly integrated microcircuit incorporating four resistor arrays and their associated registers and counters and the serial interface logic providing direct communication between the host and the XDCP potentiometers. Serial Interface The X9409 supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter and the receiving device as the receiver. The device controlling the transfer is a master and the device being controlled is the slave. The master will always initiate data transfers and provide the clock for both transmit and receive operations. Therefore, the X9409 will be considered a slave device in all applications. Clock and Data Conventions Data states on the SDA line can change only during SCL LOW periods (tLOW). SDA state changes during SCL HIGH are reserved for indicating start and stop conditions. Start Condition All commands to the X9409 are preceded by the start condition, which is a HIGH to LOW transition of SDA while SCL is HIGH (tHIGH). The X9409 continuously monitors the SDA and SCL lines for the start condition and will not respond to any command until this condition is met. Stop Condition All communications must be terminated by a stop condition, which is a LOW to HIGH transition of SDA while SCL is HIGH. Acknowledge Acknowledge is a software convention used to provide a positive handshake between the master and slave devices on the bus to indicate the successful receipt of data. The transmitting device, either the master or the slave, will release the SDA bus after transmitting eight bits. The master generates a ninth clock cycle and during this period the receiver pulls the SDA line LOW to acknowledge that it successfully received the eight bits of data. The X9409 will respond with an acknowledge after recognition of a start condition and its slave address and once again after successful receipt of the command byte. If the command is followed by a data byte the X9409 will respond with a final acknowledge. Array Description The X9409 is comprised of four resistor arrays. Each array contains 63 discrete resistive segments that are connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical potentiometer (VH/RH and VL/RL inputs). At both ends of each array and between each resistor segment is a CMOS switch connected to the wiper (VW/RW) output. Within each individual array only one switch may be turned on at a time. These switches are VCC VL0/RL0 VH0/RH0 WP SDA A1 1 2 3 4 5 6 7 8 9 10 24 23 22 21 20 19 18 17 16 15 NC VL3/RL3 VH3/RH3 VW3/RW3 A0 NC A3 SCL VL2/RL2 VH2/RH2 SOIC X9409 V SS VW0/RW0 14 13 11 12 A2 VL1/RL1 VH1/RH1 VW1/RW1 VW2/RW2 NC SDA A1 VH2/RH2 1 2 3 4 5 6 7 8 9 10 24 23 22 21 20 19 18 17 16 15 WP A2 VW0/RW0 VCC NC VL3/RL3 VH3/RH3 VW3/RW3 TSSOP X9409 VW2/RW2 14 13 11 12 A3 VL1/RL1 VH1/RH1 VW1/RW1 A0 NC VH0/RH0 NC SCL VL2/RL2 VL0/RL0 VSS X9409 |
Similar Part No. - X9409WV24IZ-2.7 |
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Similar Description - X9409WV24IZ-2.7 |
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