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ISL6144IV Datasheet(PDF) 2 Page - Intersil Corporation |
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ISL6144IV Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 29 page 2 FN9131.3 February 15, 2007 Pinouts ISL6144 (16 LD TSSOP) TOP VIEW ISL6144 (20 LD 5x5 QFN) TOP VIEW GATE VIN HVREF NC NC NC NC NC NC NC NC VSET COMP FAULT 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 VOUT GND 1 2 3 4 5 67 8 9 10 15 14 13 12 11 20 19 18 17 16 VIN HVREF NC NC NC VOUT COMP VSET NC NC Pin Descriptions TSSOP PIN # QFN PIN # SYMBOL FUNCTION DESCRIPTION 1 19 GATE External FET Gate Drive Allows active control of external N-Channel FET gate to perform ORing function. 21 VIN Power Supply Connection Chip bias input. Also provides a sensing node for external FET control. 3 2 HVREF Chip High Voltage Reference Low side of floating high voltage reference for all of the HV chip circuitry. 8 7 GND Chip Ground Reference Chip ground reference point. 99 FAULT Fault Output Provides an open drain active low output as an indication that a fault has occurred: GATE is OFF (GATE < VIN + 0.37V) or other types of faults resulting in VIN - VOUT > 0.41V. 14 13 VSET Low Side Connection for Trip Level Resistor connected to COMP provides adjustable “Vd-Vs” trip level along with pin COMP. 15 14 COMP High Side Connection for HS Comparator Trip Level Resistor connected to VOUT provides sense point for the adjustable Vd-Vs trip level along with pin VSET. 16 15 VOUT Chip Bias and Load Connection Provides the second sensing node for external FET control and chip output bias. 4-7, 10-13 3-6, 8, 10-12, 16-18, 20 NC No Connection ISL6144 |
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