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BQ4010YMA-85 Datasheet(PDF) 9 Page - Texas Instruments

Part # BQ4010YMA-85
Description  8 k x 8 NONVOLATILE SRAM (5 V, 3.3 V)
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

BQ4010YMA-85 Datasheet(HTML) 9 Page - Texas Instruments

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Previous Data Valid
Data Valid
Address
DOUT
tRC
tAA
tOH
High−Z
High−Z
CE
DOUT
tRC
tACE
tCLZ
tCHZ
bq4010/Y/LY
SLUS116A – MAY 1999 – REVISED APRIL 2007
Table 2. READ CYCLE (TA = TOPR, VCC(min)≤ VCC≤ VCC(max))
-70
-85
-150
-200
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
tRC
Read cycle time
70
85
150
200
tAA
Address access time
70
85
150
200
tACE
Chip enable access time
Output load A
70
85
150
200
tOE
Output enable to output valid
35
45
70
90
tCLZ
Chip enable to output in low Z
5
5
5
5
ns
tOLZ
Output enable to output in low Z
0
0
0
0
Output load B
tCHZ
Chip disable to output in high Z
0
25
0
25
0
25
0
25
tOHZ
Output disable to output in high Z
0
25
0
25
0
25
0
25
tOH
Output hold from address change
Output load A
10
10
10
10
(1)
WE is held high for a read cycle.
(2)
Device is continuously selected: CE = OE = VIL.
Figure 5. Read Cycle No. 1 (Address Access) (1)(2)
(1)
WE is held high for a read cycle.
(2)
Device is continuously selected: CE = OE = VIL.
(3)
Address is valid prior to or coincident with CE transition low.
Figure 6. Read Cycle No. 2 (CE Access) (1)(2)(3)
9
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