ISL9000IRKCZ datasheet(4/11 Pages) INTERSIL

Part #	ISL9000IRKCZ

Description	Dual LDO with Low Noise, Very High PSRR, and Low IQ

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Manufacturer	INTERSIL [Intersil Corporation]

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4

FN9217.3

August 2, 2006

LDO Soft-Start Ramp Rate

TSSR

Slope of linear portion of LDO output voltage ramp during

start-up

30

60

μs/V

EN1, EN2 PIN CHARACTERISTICS

Input Low Voltage

VIL

-0.3

0.5

V

Input High Voltage

VIH

1.4

VIN+0.3

V

Input Leakage Current

IIL, IIH

0.1

μA

Pin Capacitance

CPIN

Informative

5

pF

POR1, POR2 PIN CHARACTERISTICS

POR1, POR2 Thresholds

VPOR+

As a percentage of nominal output voltage

91

94

97

%

VPOR-

87

90

93

%

POR1 Delay

TP1LH

1.0

2.0

3.0

ms

TP1HL

25

μs

POR2 Delay

TP2LH

CPOR = 0.01μF

100

200

300

ms

TP2HL

25

μs

POR1, POR2 Pin Output Low

Voltage

VOL

@IOL = 1.0mA

0.2

V

POR1, POR2 Pin Internal Pull-Up

Resistance

RPOR

78

100

180

k

Ω

NOTES:

3. Guaranteed by design and characterization.

4. VOx = 0.98 * VOx(NOM); Valid for VOx greater than 1.85V.

Electrical Specifications

Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature

range of the device as follows:

TA = -40°C to +85°C; VIN = (VO+0.5V) to 6.5V with a minimum VIN of 2.3V; CIN = 1µF; CO = 1µF;

CBYP = 0.01µF; CPOR = 0.01µF (Continued)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

VPOR+

VPOR-

<tP1HL

tP2LH

tP1LH

tP1HL

tP2HL

<tP2HL

VO1

VO2

POR1

POR2

EN2

TEN

VPOR-

FIGURE 1. TIMING PARAMETER DEFINITION

EN1

ISL9000

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