11

FN9256.0

March 7, 2006

Applications Information

Output Inductor and Capacitor Selection

To consider state steady and transient operation, ISL6273

typically uses a 1.8µH output inductor. Higher or lower

inductor value can be used to optimize the total converter

system performance. For example, for higher output voltage

3.3V application, in order to decrease the inductor current

ripple and output voltage ripple, the output inductor value

can be increased as shown in Table 1. The inductor ripple

current can be expressed as follows:

The inductor’s saturation current rating needs be at least

larger than the peak current. The ISL6273 protects the peak

current 2.1A. The saturation current needs be over 2.1A for

maximum output current application.

ISL6273 uses internal compensation network and the output

capacitor value is dependant on the output voltage. The

ceramic capacitor is recommended to be X5R or X7R. The

recommended minimum output capacitor values are shown

in Table 1.

In Table 1, the minimum output capacitor value is given for

different output voltage to make sure the whole converter

system stable. Due to the limitation on power dissipation

when the regulator disable and discharge output capacitor,

there is the maximum output capacitor value. The maximum

output capacitor value is variable with the output voltage.

The plot curve is shown in Figure 20.

Input Capacitor Selection

The main functions for the input capacitor are to provide

decoupling of the parasitic inductance and to provide filtering

function to prevent the switching current flowing back to the

battery rail. A 10

µF X5R or X7R ceramic capacitor is a good

starting point for the input capacitor selection.

Output Voltage Setting Resistor Selection

The resistors R2 and R3 shown in Figure 16 set the output

voltage for the adjustable version. The output voltage can be

calculated by:

where the 0.8V is the reference voltage. The voltage divider

consists of R2 and R3 increases the quiescent current by

Vo/(R2+R3) so larger resistance is desirable. On the other

hand, the FB pin has leakage current that will cause error in

the output voltage setting. The leakage current has a typical

value of 0.1

µA. To minimize the accuracy impact on the

output voltage, select the R3 no larger than 200k

Ω.

Layout Recommendation

The layout is a very important converter design step to make

sure the designed converter works well. For ISL6273 buck

converter, the power loop is composed of the output inductor

necessary to make the power loop as small as possible. In

order to make the output voltage regulate well and avoid the

noise couple from the power loop specially for PFM mode

operation, SGND pin should be connected with PGND pin at

the terminals of the load.

The heat of the IC is mainly dissipated through the thermal

pad. Maximizing the copper area connected to the thermal

pad is preferable. In addition, a solid ground plane is helpful

for EMI performance.

L

0.8V

10µF

1.0µH~2.2µH

1.2V

10µF

1.2µH~2.2µH

1.6V

10µF

1.8µH~2.2µH

1.8V

10µF

1.8µH~3.3µH

2.5V

10µF

1.8µH~3.3µH

3.3V

6.8µF

1.8µH~4.7µH

3.6V

4.7µF

1.8µH~4.7µH

∆I

---------

–







•

•

---------------------------------------

=

600

505

410

315

220

125

30

1.27

0.8

1.73

2.2

2.67

3.13

3.6

OUTPUT VOLTAGE (V)

FIGURE 20. THE MAXIMUM CAP vs THE OUTPUT VOLTAGE

0.8

1

-------

+







•

=

ISL6273