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HCPL4503SDM Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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HCPL4503SDM Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 10 page 4 www.fairchildsemi.com HCPL4503M Rev. 1.0.2 Switching Characteristics (TA = 0 to 70°C unless otherwise specified., VCC = 5V) ** All Typicals at TA = 25°C Isolation Characteristics (TA = 0 to 70°C Unless otherwise specified) Notes: 2. The 1.9 k Ω load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor. 3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8V). 4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together. Symbol Parameter Test Conditions Min. Typ.** Max. Unit TPHL Propagation Delay Time to Logic Low RL = 1.9kΩ, IF = 16mA (2) (Fig. 7) TA = 25°C 0.45 0.8 µs RL = 1.9kΩ, IF = 16mA (2) (Fig. 7) 1.0 µs TPLH Propagation Delay Time to Logic High RL = 1.9kΩ, IF = 16mA (2) (Fig. 7) TA = 25°C 0.3 0.8 µs RL = 1.9kΩ, IF = 16mA (2) (Fig. 7) 1.0 µs |CMH| Common Mode Transient Immunity at Logic High IF = 0 mA, VCM = 1,500VP-P, TA = 25°C, RL = 1.9kΩ (3)(Fig. 8) 15,000 50,000 V/µs |CML| Common Mode Transient Immunity at Logic Low IF = 16mA, VCM = 1,500VP-P, RL = 1.9kΩ (3) (Fig. 8) 15,000 30,000 V/µs Symbol Characteristics Test Conditions Min. Typ.** Max. Unit II-O Input-Output Insulation Leakage Current Relative humidity = 45%, TA = 25°C, t = 5s, VI-O = 3000VDC (4) 1.0 µA VISO Withstand Insulation Test Voltage RH ≤ 50%, TA = 25°C, II-O ≤ 2µA, t = 1 min. (4) 5,000 VRMS RI-O Resistance (input to output) VI-O = 500VDC 1012 Ω CI-O Capacitance (input to output) f = 1MHz(4) 0.6 pF |
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