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SN54ALS163BJ Datasheet(PDF) 2 Page - Texas Instruments |
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SN54ALS163BJ Datasheet(HTML) 2 Page - Texas Instruments |
2 / 27 page SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, SN54AS163 SN74ALS161B, SN74ALS163B, SN74AS161, SN74AS163 SYNCHRONOUS 4-BIT DECADE AND BINARY COUNTERS SDAS276A – DECEMBER 1994 – REVISED JULY 2000 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) produces a high-level pulse while the count is maximum (9 or 15, with QA high). The high-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the level of CLK. These counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times. The SN54ALS161B, SN54ALS162B, SN54ALS163B, SN54AS161, and SN54AS163 are characterized for operation over the full military temperature range of – 55 °C to 125°C. The SN74ALS161B, SN74ALS163B, SN74AS161, and SN74AS163 are characterized for operation from 0 °C to 70°C. logic symbols† 14 13 12 11 CTRDIV10 LOAD 1, 5D 3 A 4 B 5 C 6 D 5CT=0 1 M2 M1 9 C5/2,3,4+ G3 10 ENT RCO 15 3CT=9 QA QB QC QD G4 7 ENP 2 CLK CLR SN54ALS162B DECADE COUNTER WITH SYNCHRONOUS CLEAR 14 13 12 11 CTRDIV16 LOAD 1, 5D 3 A 4 B 5 C 6 D CT=0 1 M2 M1 9 C5/2,3,4+ G3 10 ENT RCO 15 3CT=15 QA QB QC QD G4 7 ENP 2 CLK CLR [1] [2] [4] [8] ’ALS161B AND ’AS161 BINARY COUNTERS WITH DIRECT CLEAR 14 13 12 11 CTRDIV16 LOAD 1, 5D 3 A 4 B 5 C 6 D 5CT=0 1 M2 M1 9 C5/2,3,4+ G3 10 ENT RCO 15 3CT=15 QA QB QC QD G4 7 ENP 2 CLK CLR ’ALS163B AND ’AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR [1] [2] [4] [8] [1] [2] [4] [8] † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, J, and N packages. |
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