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AS8F128K32 Datasheet(PDF) 5 Page - Austin Semiconductor |
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AS8F128K32 Datasheet(HTML) 5 Page - Austin Semiconductor |
5 / 22 page FLASH FLASH FLASH FLASH FLASH AS8F128K32 Austin Semiconductor, Inc. AS8F128K32 Rev. 2.0 5/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 Sector Protection/Unprotection The hardware sector protection feature disables both program and erase operations in any sector. The hardware sector unprotection feature re-enables both program and erase operations in previously protected sectors. Sector protection/unprotection must be implemented using programming equipment. The procedure requires a high voltage (V ID) on address pin A9 and the control pins. The device is shipped with all sectors unprotected. It is possible to determine whether a sector is protected or unprotected. See “Autoselect Mode” for details. Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (refer to the Command Definitions table). In addition, the following hardware data protection measures prevent accidental erasure or programming, which might otherwise be caused by spurious system level signals during V CC power-up and power-down transitions, or from system noise. Low VCC Write Inhibit When V CC is less than VLKO, the device does not accept any write cycles. This protects data during V CC power-up and power-down. The command register and all internal program/ erase circuits are disabled, and the device resets. Subsequent writes are ignored until V CC is greater than VLKO. The system must provide the proper signals to the control pins to prevent unintentional writes when V CC is greater than VLKO. Write Pulse “Glitch” Protection Noise pulses of less than 5 ns (typical) on OE\, CEx\ or WEx\ do not initiate a write cycle. Logical Inhibit Write cycles are inhibited by holding any one of OE\ = V IL, CEx\ = V IH or WEx\ = VIH. To initiate a write cycle, CEx\ and WEx\ must be a logical zero while OE\ is a logical one. Power-Up Write Inhibit If WEx\ = CEx\ = V IL and OE\ = VIH during power up, the device does not accept commands on the rising edge of WEx\. The internal state machine is automatical ly reset to reading array data on power-up. TABLE 3: Autoselect Codes (High Voltage Method) DESCRIPTION CEx\ OE\ WEx\ A16 to A14 A13 to A10 A9 A8 to A7 A6 A5 to A2 A1 A0 I/O0 to I/O7 I/O8 to I/O15 I/O16 to I/O23 I/O24 to I/O31 Manufacturer ID: AMD LL H X X VID XL X L L 01h Device ID: AM29F010B LL H X X VID XL X L H 20h 01h (protected) 00h (unprotected) Sector Protection Verification LL H SA X VID XL X H L LEGEND: L = Logic Low = V IL, H = Logic High = VIH, SA = Sector Address, X = Don’t care. |
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