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PC18B04 Datasheet(PDF) 3 Page - ATMEL Corporation |
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PC18B04 Datasheet(HTML) 3 Page - ATMEL Corporation |
3 / 12 page 3 1389CS–CASIC–06-Nov-06 ATC18 Summary 2. Standard Cell Library SClib The Atmel Standard Cell Library, SClib, contains a comprehensive set of combinational logic and storage cells. The SClib library includes cells which belong to the following categories: • Buffers and Gates • Multiplexers • Flip-flops • Scan Flip-flops •Latches • Adders and Subtractors 2.1 Decoding the Cell Name Table 2-1 shows the naming conventions for the cells in the SClib library. Each cell name begins with either a two-, three-, or four-letter code that defines the type of cell. This indicates the range of standard cells available. Table 2-1. Cell Codes Code Description Code Description AD Adder INVB Balanced Inverter AH Half Adder INVT Inverting 3-State Buffer AS Adder/Subtractor LA D Latch AN AND Gate MI Inverting Multiplexer AOI AND-OR-Invert Gate MX Multiplexer AON AND-OR-AND-Invert Gates ND NAND Gate AOR AND-OR Gate NR NOR Gate BH Bus Holder OAI OR-AND-Invert Gate BUFB Balanced Buffer OAN OR-AND-OR-Invert Gates BUFF Non-Inverting Buffer OR OR Gate BUFT Non-Inverting 3-State Buffer ORA OR-AND Gate CG Carry Generator SD Multiplexed Scan D Flip-Flop CLK2 Clock Buffer SE Multiplexed Scan Enable D Flip-Flop DE D-Enabled Flip-Flop SU Subtractor DF D Flip-Flop XN Exclusive NOR Gate INV0 Inverter XR Exclusive OR Gate |
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