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ADSP-TS201SYBPZ050 Datasheet(PDF) 23 Page - Analog Devices |
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ADSP-TS201SYBPZ050 Datasheet(HTML) 23 Page - Analog Devices |
23 / 48 page ADSP-TS201S Rev. C | Page 23 of 48 | December 2006 PACKAGE INFORMATION The information presented in Figure 8 provide details about the package branding for the ADSP-TS201S processors. For a com- plete listing of product availability, see Ordering Guide on Page 46. ABSOLUTE MAXIMUM RATINGS Stresses greater than those listed below may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specifica- tion is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD SENSITIVITY Figure 8. Typical Package Brand Table 19. Package Brand Information Brand Key Field Description t Temperature Range pp Package Type Z Lead Free Option (optional) ccc See Ordering Guide LLLLLLLLL-L Silicon Lot Number R.R Silicon Revision yyww Date Code vvvvvv Assembly Lot Code LLLLLLLLL-L 2.0 tppZ-ccc T ADSP-TS20xS a yyww country_of_origin vvvvv Table 20. Absolute Maximum Ratings Parameter Rating Internal (Core) Supply Voltage (VDD)–0.3 V to +1.4 V Analog (PLL) Supply Voltage (VDD_A)–0.3 V to +1.4 V External (I/O) Supply Voltage (VDD_IO)–0.3 V to +3.5 V External (DRAM) Supply Voltage (VDD_DRAM)–0.3 V to +2.1 V Input Voltage 1 1 Applies to 10% transient duty cycle. For other duty cycles see Table 18. –0.63 V to +3.93 V Output Voltage Swing –0.5 V to VDD_IO+0.5 V Storage Temperature Range –65°C to +150°C ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be take to avoid performance degradation or loss of functionality. |
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