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MC68HC05K3CDW Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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MC68HC05K3CDW Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
6 / 132 page Technical Data MC68HC05K3 — Revision 4.0 6 Table of Contents MOTOROLA Table of Contents Section 3. Central Processor Unit (CPU) Core 3.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 3.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 3.3 Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 3.3.1 Stack Pointer (SP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 3.3.2 Program Counter (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Section 4. Interrupts 4.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 4.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 4.3 Central Processor Unit (CPU) Interrupt Processing . . . . . . . . .40 4.4 Reset Interrupt Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 4.5 Software Interrupt (SWI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 4.6 Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 4.6.1 External Interrupt (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 4.6.2 IRQ Status/Control Register . . . . . . . . . . . . . . . . . . . . . . . . .45 4.6.3 Port A Interrupts (PA0–PA3) . . . . . . . . . . . . . . . . . . . . . . . .46 4.6.4 Timer Interrupt (TIMER) . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 Section 5. Resets 5.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 5.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 5.3 External Reset (RESET). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 5.4 Internal Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 5.4.1 Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 5.4.2 Computer Operating Properly Reset (COPR) . . . . . . . . . . .51 5.4.3 Illegal Address Reset (ILADR) . . . . . . . . . . . . . . . . . . . . . . .51 |
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