 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
93C76A Datasheet(PDF) 6 Page - Microchip Technology |
|
||||||||||||||||||||||||||||||
93C76A Datasheet(HTML) 6 Page - Microchip Technology |
|
|
6 / 26 page  93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C DS21796D-page 6 2004 Microchip Technology Inc. 2.4 ERASE The ERASE instruction forces all data bits of the specified address to the logical ‘1’ state. The rising edge of CLK before the last address bit initiates the write cycle. The DO pin indicates the READY/BUSY status of the device if CS is brought high after a minimum of 250 ns low (TCSL). DO at logical ‘0’ indicates that programming is still in progress. DO at logical ‘1’ indicates that the register at the specified address has been erased and the device is ready for another instruction. Note: Issuing a Start bit and then taking CS low will clear the READY/BUSY status from DO. FIGURE 2-1: ERASE TIMING CS CLK DI DO TCSL CHECK STATUS 1 1 1AN AN-1 AN-2 ••• A0 TSV TCZ BUSY READY HIGH-Z TWC HIGH-Z |
Similar Part No. - 93C76A |
|
Similar Description - 93C76A |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
