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MCZ33285EF Datasheet(PDF) 7 Page - Freescale Semiconductor, Inc |
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MCZ33285EF Datasheet(HTML) 7 Page - Freescale Semiconductor, Inc |
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7 / 13 page  Analog Integrated Circuit Device Data Freescale Semiconductor 7 33285 FUNCTIONAL DESCRIPTION INTRODUCTION FUNCTIONAL DESCRIPTION INTRODUCTION The power FETs are turned ON by charging their gate capacities with a current flowing out of pins OUT1 and OUT2. During PWM, the values of table below are guaranteed. They are measured with 8.0 nF on OUT1 and 16 nF on OUT2. Test condition VIN: ramp 0 V ≤ 2.5 V or 2.5 V ≤ 5.0 V. Figure 4. Turn On Behavior The output voltages at OUT1 and OUT2 are limited by controlling the current sources ION1, ION2 to avoid current flowing through the external or the internal zener diode. When voltage power supply plus threshold voltage (VCC + VTH) is reached, the current sources are turned OFF. • Threshold VTH1 for OUT1 output voltage control is 7.0 V < VTH1 < VZ • Threshold VTH2 for OUT2 output voltage control is 7.0 V < VTH2 < 15 V Turn Off Characteristics The power FETs on OUT1 and OUT2 are turned OFF by discharging the gate capacity with the constant discharge current IOUTOFF. • Discharge current IOUTxOFF is IOUTxOFF = 110 µA condition: VOUT x > 0.5 V ( VIN < VTHRxIN ) • Test conditions for switching OFF the power FETs: 1. IN open 2. Stages disabled via pin IN 3. Stage OUT1 disabled by an over current error 20 ms 2.5 V 5.0 V IN VCCP THRIN1 THRIN2 IN VOUT1 0 V 0 V 2.5 V IN 0 2.5 V 0 V 5.0 V VOUT2 IN tON1 0 VVCC + 7.0 VOUT2 VOUT2MAX tON2 tON3 VOUT1MAX VOUT1 VOUT2 tON1 tON2 tON3 VOLTAGE VVCC MINIMUM VOUT1, OUT2 AFTER TON1 = 100 µSEC MINIMUM VOUT1,OUT2 AFTER TON2 = 1.0 µSEC MINIMUM VOUT1,OUT2 AFTER TON3 = 1.5 µSEC 7.0 V < VVCC < 10 V 10 V < VVCC < 20 V 20 V < VVCC < 40 V VVCC - 0.7 V VVCC - 0.7 V VVCC - 0.7 V VVCC + 5.95 V VVCC + 9.35 V VVCC + 7.0 V VVCC + 11 V |
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