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MCF5274LVM133 Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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MCF5274LVM133 Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
2 / 44 page MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 2 Preliminary—Subject to Change Without Notice MCF5275 Family Configurations Freescale Semiconductor 2 In addition, the MCF5275 family features an enhanced multiply accumulate unit (EMAC), large on-chip memory (64 Kbytes SRAM, 16 Kbytes configurable cache), and a 16-bit DDR SDRAM memory controller. These devices are ideal for cost-sensitive applications requiring significant control processing for file management, connectivity, data buffering, and user interface, as well as signal processing in a variety of key markets such as security, imaging, networking, gaming, and medical. This leading package of integration and high performance allows fast time to market through easy code reuse and extensive third party tool support. To locate any published errata or updates for this document, refer to the ColdFire products website at http://www.freescale.com/coldfire. 1 MCF5275 Family Configurations Table 1. MCF5275 Family Configurations Module MCF5274L MCF5275L MCF5274 MCF5275 ColdFire Version 2 Core with EMAC (Enhanced Multiply-Accumulate Unit) xxxx System Clock up to 166 MHz Performance (Dhrystone 2.1 MIPS) up to 159 Instruction/Data Cache 16 Kbytes (configurable) Static RAM (SRAM) 64 Kbytes Interrupt Controllers (INTC) 2222 Edge Port Module (EPORT) xxxx External Interface Module (EIM) xxxx 4-channel Direct-Memory Access (DMA) xxxx DDR SDRAM Controller xxxx Fast Ethernet Controller (FEC) 1122 Watchdog Timer Module (WDT) xxxx 4-channel Programmable Interval Timer Module (PIT) xxxx 32-bit DMA Timers 4444 USB xxxx QSPI xxxx UART(s) 3333 I2C xxxx PWM 4444 General Purpose I/O Module (GPIO) xxxx CIM = Chip Configuration Module + Reset Controller Module xxxx Debug BDM xxxx JTAG - IEEE 1149.1 Test Access Port xxxx Hardware Encryption — x — x Package 196 MAPBGA 196 MAPBGA 256 MAPBGA 256 MAPBGA |
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