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SP206BCP Datasheet(PDF) 6 Page - Sipex Corporation

Part # SP206BCP
Description  5V High-Speed RS-232 Transceivers with 0.1mF Capacitors
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Manufacturer  SIPEX [Sipex Corporation]
Direct Link  http://www.sipex.com
Logo SIPEX - Sipex Corporation

SP206BCP Datasheet(HTML) 6 Page - Sipex Corporation

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Date:05/26/2005
+5V High-Speed RS232 Transceivers
© Copyright 2005 Sipex Corporation
6
attain symmetrical
±10V power supplies.
Figure 3a shows the waveform found on the
positive side of capcitor C
2, and Figure 3b
shows the negative side of capcitor C
2. There is
a free–running oscillator that controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— V
SS charge storage —During this phase of the
clock cycle, the positive side of capacitors C
1
and C
2 are initially charged to +5V. Cl
+ is then
switched to ground and the charge in C
1
is
transferred to C
2
. Since C
2
+ is connected to
+5V, the voltage potential across capacitor C
2 is
now 10V.
Phase 2
— V
SS transfer — Phase two of the clock con-
nects the negative terminal of C
2 to the VSS
storage capacitor and the positive terminal of C
2
to ground, and transfers the generated –l0V to
C
3. Simultaneously, the positive side of capaci-
tor C
1 is switched to +5V and the negative side
is connected to ground.
Phase 3
— V
DD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C
1 produces –5V in the negative
terminal of C
1, which is applied to the negative
side of capacitor C
2. Since C2
+ is at +5V, the
voltage potential across C
2 is l0V.
Phase 4
— V
DD transfer — The fourth phase of the clock
connects the negative terminal of C
2 to ground,
and transfers the generated l0V across C
2 to C4,
the V
DD storage capacitor. Again, simultaneously
with this, the positive side of capacitor C
1 is
switched to +5V and the negative side is con-
nected to ground, and the cycle begins again.
Since both V+ and Vare separately generated
from V
CC; in a no–load condition V
+ and Vwill
be symmetrical. Older charge pump approaches
that generate Vfrom V+ will show a decrease in
the magnitude of Vcompared to V+ due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors can
be as low as 0.1
µF with a 16V breakdown
voltage rating.
The SP200 Series devices are made up of three
basic circuit blocks — 1) transmitter/driver, 2)
receiver and 3) the Sipex proprietary charge
VCC = +5V
–5V
–5V
+5V
VSS Storage Capacitor
VDD Storage Capacitor
C1
C2
C3
C4
+
+
++
Figure 1. Charge Pump — Phase 1
Figure 2. Charge Pump — Phase 2
VCC = +5V
–10V
VSS Storage Capacitor
VDD Storage Capacitor
C1
C2
C3
C4
+
+
++


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