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SP7651 Datasheet(PDF) 6 Page - Sipex Corporation |
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SP7651 Datasheet(HTML) 6 Page - Sipex Corporation |
6 / 8 page Sept12-06 SP7651 Evaluation Manual ©2006 Sipex Corporation Page 6 of 8 The simple guidelines for positioning the poles and zeros and for calculating the component values for Type III compensation are as follows: a. Choose fco = fs / 5 b. Calculate fp_LC fp_LC = 1 / [2π (L ●C) ^ 1/2 ] c. Calculate fz_ESR fz_ESR = 1 / 2π (RESR) ● (COUT) d. Select R1 component value such that 50kΩ ≤ R1 ≤ 100kΩ e. Calculate R2 base on the desired VOUT R2 = R1 / [(VOUT / 0.80V) – 1] f. Select the ratio of Rz2 / R1 gain for the desired gain bandwidth Rz2 = R1 (VRAMP_PP / VIN_MAX) (fco / fp_LC) g. Calculate Cz2 by placing the zero at ½ of the output filter pole frequency Cz2 = 1 / [π (Rz2) ● (fp_LC) ] h. Calculate Cp1 by placing the first pole at ESR zero frequency Cp1 = 1 / [2π (Rz2) ● (fz_ESR) ] i. Calculate Rz3 by setting the second pole at ½ of the switching frequency and the second zero at the output filter double pole frequency Rz3 = 2 (R1) (fp_LC) / fs j. Calculate Cz3 from Rz3 component value above Cz3 = 1 / π (Rz3) ● (fs) k. Choose 100pF ≤ Cf1 ≤ 220pF to stabilize the SP7651ER internal Error Amplifier Note: Loop Compensation component calculations discussed in this section are further elaborated in the application note #ANP16, “Loop Compensation of Voltage-Mode Buck Converters”. These calculations shown here can be quickly iterated with the Type III Loop Compensation Calculator on the web at: www.sipex.com/files/Application-Notes/TypeIIICalculator.xls |
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