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SAA7182AWP Datasheet(PDF) 11 Page - NXP Semiconductors |
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SAA7182AWP Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 45 page  1996 Oct 02 11 Philips Semiconductors Preliminary specification Digital Video Encoder (EURO-DENC2) SAA7182A; SAA7183A FUNCTIONAL DESCRIPTION The digital video encoder (EURO-DENC2) encodes digital luminance and colour difference signals into analog CVBS and simultaneously S-Video signals. NTSC-M, PAL B/G, SECAM standards and sub-standards are supported. Both interlaced and non-interlaced operation is possible for all standards. In addition, the de-matrixed Y, Cb, and Cr input is available on three separate analog outputs as RED, GREEN and BLUE. Under software control the dematrix can be by-passed to output digital-to-analog converted Cr, Y, and Cb signals on RGB outputs. Separate digital gain adjustment for luminance and colour difference signals is available. Analog on-chip multiplexing between internal digital-to-analog converted RGB and external RI, GI and BI signals is also supported. The basic encoder function consists of subcarrier generation, colour modulation and insertion of synchronization signals. Luminance and chrominance signals are filtered in accordance with the standard requirements of “ RS-170-A” and “CCIR 624”. For ease of analog post filtering the signals are twice oversampled with respect to the pixel clock before digital-to-analog conversion. For total filter transfer characteristics see Figs 5, 6, 7, 8, 9 and 10. The DACs for Y, C, and CVBS are realized with full 10-bit resolution, DACs for RGB are with 9-bit resolution. The MPEG port (MP) accept 8 line multiplexed Cb, Y, Cr data. The 8-bit multiplexed Cb-Y-Cr formats are “ CCIR 656” (D1 format) compatible, but the SAV and EAV codes can be decoded optionally, when the device is to operate in slave mode. Alternatively, 8-bits Y on MP port and 8-bit multiplexed Cb, Cr on DP port can be chosen as input. A crystal-stable master clock (LLC) of 27 MHz, which is twice the CCIR line-locked pixel clock of 13.5 MHz, needs to be supplied externally. Optionally, a crystal oscillator input/output pair of pins and an on-chip clock driver is provided. It is also possible to connect a Philips Digital Video Decoder (SAA7111 or SAA7151B) in conjunction with a CREF clock qualifier to EURO-DENC2. Via the RTCI pin, connected to RTCO of a decoder, information concerning actual subcarrier, PAL-ID, and if connected to SAA7111, definite subcarrier phase can be inserted. The EURO-DENC2 synthesizes all necessary internal signals, colour subcarrier frequency, and synchronization signals, from that clock. European teletext encoding is supported if an appropriate teletext bitstream is applied to the TTX pin. Wide screen signalling data can be loaded via the I2C-bus, and is inserted into line 23 for standards using 50 Hz field rate. The IC also contains Closed Caption and Extended Data Services Encoding (Line 21), and supports anti-taping signal generation in accordance with Macrovision; it also supports overlay via KEY and three control bits by a 24 × 8 LUT. A number of possibilities are provided for setting different video parameters such as: Black and blanking level control Colour subcarrier frequency Variable burst amplitude etc. During reset (RESET = LOW) and after reset is released, all digital I/O stages are set to input mode. A reset forces the I2C-bus interface to abort any running bus transfer and sets register 3A to 03H, register 61 to 06H and registers 6BH and 6EH to 00H. All other control registers are not influenced by a reset. Data manager In the data manager, real time arbitration on the data stream to be encoded is performed. Depending on the polarity of pin KEY, the MP input (or MP/DP input) or OVL input are selected to be encoded to CVBS and Y/C signals, and output as RGB. KEY controls OVL entries of a programmable LUT for encoded signals and for RGB output. The common KEY switching signal can be disabled by software for the signals to be encoded (Y, C and CVBS), such that OVL will appear on RGB outputs, but not on Y, C and CVBS. OVL input under control of KEY can be also used to insert decoded teletext information or other on-screen data. Optionally, the OVL colour LUTs located in this block, can be read out in a pre-defined sequence (8 steps per active video line), achieving, for example, a colour bar test pattern generator without need for an external data source. The colour bar function is only under software control. |
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