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SAA7151B Datasheet(PDF) 6 Page - NXP Semiconductors |
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SAA7151B Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 49 page April 1993 6 Philips Semiconductors Product specification Digital multistandard colour decoder with SCART interface (DMSD2-SCART) SAA7151B Fig.2 Pin configuration. handbook, full pagewidth SAA7151A SAA7151B MEH293 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 CUV4 CUV5 CUV6 CUV7 CVBS0 CVBS1 CVBS2 CVBS3 VDD2 VSS1 CVBS4 CVBS5 CVBS6 CVBS7 GPSW1 GPSW2 HCL 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 UV2 UV3 UV4 UV5 UV6 UV7 Y0 Y1 VDD4 VSS3 Y2 Y3 Y4 Y5 Y6 Y7 CPI FUNCTIONAL DESCRIPTION System configuration The SAA7151B system processes digital TV signals with line-locked clock in PAL, SECAM and NTSC standards (CVBS or S-Video) as well as RGB signals coming from a SCART/peri-TV connector. The different source signals are switched, if necessary matrixed and converted (Fig.3 and Table 1). 8-bit CVBS data (digitized composite video) and 8-bit UV data (digitized chrominance and /or time-multiplexed colour-difference signals) are fed to the SAA7151B. The data rate is 27 MHz. Chrominance processing The 8-bit chrominance input signal (signal “C” out of CVBS or Y/C in Fig.4) is fed via the input interface to a bandpass filter for eliminating the DC component, then to the quadrature demodulator. Subcarrier signals from the local oscillator (DTO1) with 90 degree phase shift are applied to its multiplier inputs. The frequency depends on set TV standard. |
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