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SAA7191B Datasheet(PDF) 8 Page - NXP Semiconductors |
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SAA7191B Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 40 page  August 1996 8 Philips Semiconductors Product specification Digital Multistandard Colour Decoder, Square Pixel (DMSD-SQP) SAA7191B 7 FUNCTIONAL DESCRIPTION 7.1 Chrominance processor The 8-bit chrominance input signal (CVBS or chrominance format) passes a bandpass filter to eliminate DC components and to decimate the sample rate before it is fed to the two multipliers (quadrature demodulator), Fig.3. Two subcarrier signals from a local oscillator (0 to 90 degree) are fed to the multiplicator inputs of the multipliers. The multipliers operate as a quadrature demodulator for all PAL and NTSC signals; it operates as a frequency down-mixer for SECAM signals. The two multiplier output signals are converted to a serial data stream and applied to three low-pass filter stages, then to a gain controlled amplifier. A final multiplexed low-pass filter achieves, together with the preceding stages, the required bandwidth performance. The signals, originated from PAL and NTSC, are applied to a comb-filter. The signals, originated from SECAM, are fed through a Cloche filter (0 Hz centre frequency), a phase demodulator and a differentiator to obtain frequency-demodulated colour-difference signals.The SECAM signals are fed after de-emphasis to a cross-over switch, to provide the both serial-transmitted colour-difference signals. These signals are fed finally to the output formatter stages and to the output interface. |
Similar Part No. - SAA7191B |
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Similar Description - SAA7191B |
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