DVI/HDMI TMDS FR-4 and

Cable Equalizer/Driver

8

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CML Inputs and Outputs

The input buffers and the output drivers are current-

mode logic (CML). See Figures 2, 3, and 4.

The input buffers consist of a 50

Ω load resistor connected

The output drivers are open-collector. The current in

these outputs can be adjusted to 10mA or 15mA with

the control pin LEVEL. For 10mA operation, each open-

collector output drives through a transmission line to a

50

Ω pullup of the next stage, as shown in Figure 3. For

recommended 15mA operation, the two outputs are

bridged by an external 200

Ω back termination resistor

that is subsequently pulled up by a 50

Ω resistor of the

next stage, as shown in Figure 4. The ESD structure per-

mits signals to achieve 5.5V absolute maximum ratings,

high common-mode range, and compatibility to HDMI

testing. The back termination resistor should be placed

as close as possible to the MAX3814 in the layout.

The ESD protection for both the input and output circuitry

consists of diodes connected to a transient voltage sup-

pressor clamp shown as a Schottky diode in Figures 2,

3, and 4. For more information about the function of the

suppressor clamp, refer to the

Detailed Description sec-

EQUALIZER

TRANSIENT

SUPRESSOR

CLAMP

IN_+

IN_-

50

Ω

50

Ω

+

-

TRANSIENT

SUPRESSOR

CLAMP

Figure 2. Simplified Input Circuit

5mA

50

Ω

50

Ω

ENABLE = HIGH

LEVEL = LOW

TRANSIENT

SUPRESSOR

CLAMP

10mA

OUT_+

OUT_-

Figure 3. Simplified Output Circuit Without Back Termination

Resistor