1.62V to 3.6V Improved High-Speed LLT

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9

Detailed Description

The MAX13042E–MAX13045E 4-channel, bidirectional

level translators provide the level shifting necessary for

100Mbps data transfer in multivoltage systems. The

MAX13042E–MAX13045E are ideally suited for level

translation in systems with four channels. Externally

either side of the device. Logic signals present on the

The MAX13042E–MAX13045E operate at full speed

with external drivers that source as little as 4mA output

an internal 30µA current source, allowing the

MAX13042E–MAX13045E to be driven by either push-

pull or open-drain drivers.

The MAX13042E–MAX13045E feature an enable (EN)

input that places the devices into a low-power shutdown

mode when driven low. The MAX13042E–MAX13045E

feature an automatic shutdown mode that disables the

appropriate part version (see the Ordering Information/

Selector Guide).

to +3.2V.

Level Translation

For proper operation, ensure that +2.2V

MAX13042E–MAX13045E automatically enter a low-

power mode. The devices will also enter shutdown mode

rate depends heavily on the load capacitance (see the

Rise/Fall Time vs. Capacitive Load graphs in the Typical

Operating Characteristics), output impedance of the

driver, and the operating voltage range.

Input Driver Requirements

The MAX13042E–MAX13045E architecture is based on

an nMOS pass gate and output accelerator stages

(Figure 6). The accelerators are active only when there

is a rising/falling edge on a given I/O. A short pulse is

then generated where the output accelerator stages

become active and charge/discharge the capacitances

at the I/Os. Due to its architecture, both input stages

become active during the one-shot pulse. This can lead

to current feeding into the external source that is driving

the translator. However, this behavior helps to speed

up the transition on the driven side.

The MAX13042E–MAX13045E have internal current

sources capable of sourcing 30µA to pull up the I/O

lines. These internal-pullup current sources allow the

inputs to be driven with open-drain drivers as well as

push-pull drivers. It is not recommended to use external

pullup resistors on the I/O lines. The architecture of the

MAX13042E–MAX13045E permits either side to be dri-

ven with a minimum of 4mA drivers or larger.

Output Load Requirements

The MAX13042E–MAX13045E I/O are designed to drive

CMOS inputs. Do not load the I/O lines with a resistive

load less than 25k

Ω and do not place an RC circuit at

the input of these devices to slow down the edges. If a

slower rise/fall time is required, refer to the MAX3000E/

MAX3001E logic-level translator data sheet.

MAX13042E–MAX13045E

GND

EN

Functional Diagram