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SRC4382 Datasheet(PDF) 10 Page - Burr-Brown (TI) |
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SRC4382 Datasheet(HTML) 10 Page - Burr-Brown (TI) |
10 / 81 page www.ti.com PIN CONFIGURATION Top View TQFP 36 35 34 33 32 31 30 29 28 27 26 25 SYNC BLS AESOUT VDD33 TX+ TX - DGND2 GPO4 GPO3 GPO2 GPO1 MCLK 1 2 3 4 5 6 7 8 9 10 11 12 RX1+ RX1 - RX2+ RX2 - RX3+ RX3 - RX4+ RX4 - VCC AGND LOCK RXCKO 48 47 46 45 44 43 42 41 40 39 38 13 14 15 16 17 18 19 20 21 22 23 37 24 SRC4382 NC = No Connection SRC4382 SBFS030B – JANUARY 2006 – REVISED APRIL 2006 PIN DESCRIPTIONS NAME PIN NUMBER I/O DESCRIPTION RX1+ 1 Input Line Receiver 1, Noninverting Input RX1– 2 Input Line Receiver 1, Inverting Input RX2+ 3 Input Line Receiver 2, Noninverting Input RX2– 4 Input Line Receiver 2, Inverting Input RX3+ 5 Input Line Receiver 3, Noninverting Input RX3– 6 Input Line Receiver 3, Inverting Input RX4+ 7 Input Line Receiver 4, Noninverting Input RX4– 8 Input Line Receiver 4, Inverting Input VCC 9 Power DIR Comparator and PLL Power Supply, +3.3V Nominal AGND 10 Ground DIR Comparator and PLL Power-Supply Ground LOCK 11 Output DIR PLL Lock Flag (active Low) RXCKO 12 Output DIR Recovered Master Clock (tri-state output) RXCKI 13 Input DIR Reference Clock MUTE 14 Input SRC Output Mute (active High) RDY 15 Output SRC Ready Flag (active Low) DGND1 16 Ground Digital Core Ground VDD18 17 Power Digital Core Supply, +1.8V Nominal CPM 18 Input Control Port Mode, 0 = SPI Mode, 1 = I2C Mode CS or A0 19 Input Chip Select (active Low) for SPI Mode or Programmable Slave Address for I2C Mode CCLK or SCL 20 Input Serial Data Clock for SPI Mode or I2C Mode CDIN orA1 21 Input SPI Port Serial Data input or Programmable Slave Address for I2C Mode CDOUT or SDA 22 I/O SPI Port Serial Data Output (tri-state output) or Serial Data I/O for I2C Mode 10 Submit Documentation Feedback |
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