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LT1111CN8-12 Datasheet(PDF) 11 Page - Linear Technology |
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LT1111CN8-12 Datasheet(HTML) 11 Page - Linear Technology |
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11 / 16 page  11 LT1111 1111fd S APPLICATI I FOR ATIO Figure 6. Q1 Permits Higher Current Switching. LT1111 Functions as Controller. When the switch turns off, the SW2 pin falls rapidly and actually goes below ground. D1 turns on when SW2 reaches 0.4V below ground. D1 MUST BE A SCHOTTKY DIODE. The voltage at SW2 must never be allowed to go below –0.5V. A silicon diode such as the 1N4933 will allow SW2 to go to –0.8V, causing potentially destructive power dissipation inside the LT1111. Output voltage is deter- mined by: V R R V OUT =+ () 1 2 1 125 23 .( ) R3 programs switch current limit. This is especially impor- tant in applications where the input varies over a wide range. Without R3, the switch stays on for a fixed time each cycle. Under certain conditions the current in L1 can build up to excessive levels, exceeding the switch rating and/or saturating the inductor. The 100 Ω resistor programs the switch to turn off when the current reaches approximately 700mA. When using the LT1111 in step-down mode, output voltage should be limited to 6.2V or less. Higher output voltages can be accommodated by inserting a 1N5818 diode in series with the SW2 pin (anode con- nected to SW2). Higher Current Step-Down Operation Output current can be increased by using a discrete PNP pass transistor as shown in Figure 6. R1 serves as a current limit sense. When the voltage drop across R1 equals a VBE, the switch turns off. For temperature com- pensation a Schottky diode can be inserted in series with the ILIM pin. This also lowers the maximum drop across R1 to VBE – VD, increasing efficiency. As shown, switch current is limited to 2A. Inductor value can be calculated based on formulas in the “Inductor Selection — Step- Down Converter” section with the following conservative expression for VSW: VV V V SW R Q SAT =+ ≈ 11 10 24 .( ) R2 provides a current path to turn off Q1. R3 provides base drive to Q1. R4 and R5 set output voltage. A PMOS FET can be used in place of Q1 when VIN is between 10V and 20V. LT1111 • TA08 D1 1N5821 VOUT VIN 30V MAX L1 R1 0.3 Ω R2 220 Q1 MJE210 OR ZETEX ZTX749 R3 330 R4 R5 C1 VOUT = 1.25V (1 + ) R4 R5 C2 + + LT1111 GND SW2 SW1 VIN IL FB In Figure 8, the input is negative while the output is positive. In this configuration, the magnitude of the input voltage can be higher or lower than the output voltage. A level shift, provided by the PNP transistor, supplies proper polarity feedback information to the regulator. Inverting Configurations The LT1111 can be configured as a positive-to-negative converter (Figure 7), or a negative-to-positive converter (Figure 8). In Figure 7, the arrangement is very similar to a step-down, except that the high side of the feedback is referred to ground. This level shifts the output negative. As in the step-down mode, D1 must be a Schottky diode, and VOUTshould be less than 6.2V. More negative out- put voltages can be accommodated as in the prior section. LT1111 • F07 –VOUT C2 C1 D1 1N5818 VIN R1 R2 L1 GND SW2 SW1 LIM I IN V R3 FB LT1111 + + Figure 7. Positive-to-Negative Converter |
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