7

LT1120A

1120afa

1120A TA04

–

+

C1

R1

SLEW RATE = +0.05V/

µs

– 6V/

µs

1M

C2

R2

IN

6

7

50

µA

–1

–10

–100

R1

33

Ω

100

Ω

10k

C1

0.1

µF

0.047

µF

0.002

µF

C2

0.001

µF

–

–

R2

1M

100k

10k

Compensating the Comparator as an Op Amp

Regulator with Output Voltage Monitor

1120A TA03

+

–

LOGIC

500k

5V

LOGIC

OUTPUT

7

REF

6

LT1120A

5

OUTPUT

1

GND

FEEDBACK

4

8

2

0.001

µF

98k

2k

100k

10

µF

OUTPUT

5V

LOGIC OUTPUT GOES LOW WHEN

+

PIN 7

LOGIC OUTPUT

Current Limited 1 Amp Regulator

LT1120A

1

GND

1M

100k

220

+

0.22

µF

270

Ω

2.2k

5

4

2

FB

0.5

Ω*

5V AT 1A

* SETS CURRENT

LIMIT BUT INCREASES

DROPOUT VOLTAGE

BY 0.5V.

MUST HAVE LOW

ESR. SEVERAL 100

µF

CAPACITORS CAN BE

PARALLELED.

†

1120A TA06

MJE2955

2N3906*

Battery Backup Regulator

1120A TA05

FB

4

5V

2

0.001

µF

1M

50k

1M

10

µF

LT1120A

1

GND

5

BATTERY

INPUT

FB

LT1120A

1

GND

5

MAIN

POWER

INPUT

+

4

2

INTERNAL PARASITIC

DIODES OF LT1120A

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

TYPICAL APPLICATIO S