Direct-Conversion Tuner IC

6

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_______________Detailed Description

The MAX2108 downconverts signals in the 950MHz to

2150MHz range directly to baseband in-phase/

quadrature-phase (I/Q) signals. It is designed for digital

DBS tuner applications where a direct downconversion

provides a cost savings over multiple-conversion

approaches. However, the MAX2108 is applicable to

any system requiring a broadband I/Q downconversion.

Internally, the MAX2108 consists of a broadband front-

end variable gain stage, a quadrature downconverter,

a 90° quadrature generator, a divide-by 32/33

prescaler, and high-linearity I and Q baseband buffers.

The front-end gain-control range is over 50dB.

Specifically, when the MAX2108 operates in an auto-

loop so that a sine wave at RFIN ranging in power from

-70dBm to -20dBm produces a sine wave across IOUT,

noise figure is at its minimum when GC is at its maxi-

mum gain setting.

The quadrature downconverter follows the front-end

variable-gain amplifier. The mixer LO ports are fed with

the two LO signals, which are 90° apart in phase.

These quadrature LO signals are generated internally

using the signal from the LO and LO pins.

The resulting I/Q baseband signals are fed through

separate I-channel and Q-channel baseband buffers.

The outputs are capable of driving lowpass filters with

100

Ω characteristic impedance (that is, the equivalent

of an AC-coupled 100

Ω load). The baseband -3dB out-

put bandwidth is approximately 150MHz.

Applications Information

Front-End Tuner Circuitry

for DBS Tuners

In a typical application, the signal path ahead of the

tuner includes a discrete low-noise amplifier/buffer and

a PIN-diode attenuator. Since the MAX2108 satisfies

the noise and linearity requirements for DBS, this front-

end circuitry is not required.

In some very high linearity applications, such as single

channel-per-carrier (SCPC), a varactor-tuned pre-

selection bandpass filter is added between a discrete

LNA and the MAX2108. The filter provides a means of

broadly filtering adjacent interference signals, thus

improving the intermodulation performance of the tuner.

Additionally, the filter removes RF interference at twice

the LO frequency, which otherwise adds to the co-

channel interference. The MAX2108 rejects this carrier

to approximately 25dBc.

LO Port

The MAX2108 accepts either a single-ended or differ-

ential LO signal. For single-ended drive, AC-couple the

LO signal into LO with a 47pF capacitor, and bypass

LO to ground with a 47pF capacitor in series with a

25

Ω resistor. Drive LO with a 50Ω source at -5dBm.

Prescaler

The prescaler requires a stable logic level at PS_SEL

4ns before the falling edge of PSOUT, PSOUT to assert

the desired modulus. The logic level at PS_SEL must

remain static until 2ns after this falling edge.

Baseband Buffers

The MAX2108 baseband buffers provide at least

10mVp-p differential swing across IOUT, IOUT and

QOUT, QOUT, and are capable of driving an AC-cou-

pled 100

Ω differential load. In a typical application,

IOUT, IOUT, QOUT, and QOUT drive a 5th- or 7th-order

lowpass filter for ADC anti-aliasing purposes (see the

Filters in Direct-Conversion Tuners section ). In general,

additional gain is required, after the filters. This is

accomplished with a pair of video-speed op amps,

such as the MAX4216 dual video op amp, or a simple

transistor circuit. Contact Maxim for more information

about the MAX4216.

Layout Considerations

Observe standard RF layout rules. A ground plane is

essential; when connecting areas of ground plane

between layers, use vias liberally. If a ground plane is

used under the lowpass filters, note that the filter

response may be slightly offset due to parasitic capaci-

tance.

In a direct-conversion receiver, LO leakage to the RF

input connector is a major issue, since filtering of the

LO is impossible (the LO operates at the same frequen-

cy as the RF input). Observe the power-supply bypass

capacitor connections in the Pin Description table,

notably pins 3, 5, 12, and 21. Traces from these IC pins

to the bypass capacitors must be kept on the top side

of the board and as short as possible.