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PLL620-80DC Datasheet(PDF) 6 Page - PhaseLink Corporation |
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PLL620-80DC Datasheet(HTML) 6 Page - PhaseLink Corporation |
6 / 7 page PLL620-80 Low Phase Noise XO (9.5-65MHz Output) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/09/04 Page 6 PAD DESCRIPTIONS Pad # Name X (µ µµµm) Y (µ µµµm) Description 1 GND 248 109 Ground. 2 GND 361 109 Ground. 3 Optional GND 473 109 Optional Ground. 4 GND 587 109 Ground. 5 GND 702 109 Ground. 6 Reserved 874 109 Reserved for future use. 7 GNDBUF 1042 109 Ground, buffer circuitry. 8 GNDBUF 1171 109 Ground, buffer circuitry. 9 OE_SEL 1400 125 This is the selector input to choose the OE control logic. See the OE SELECTION AND ENABLE table on page 1. Internal pull up. 10 LVDS 1400 259 LVDS output. 11 PECL 1400 476 PECL output. 12 VDDBUF 1400 616 Power supply, buffer circuitry. 13 VDDBUF 1400 716 Power supply, buffer circuitry. 14 PECLB 1400 871 Complementary PECL output. 15 LVDSB 1400 1089 Complementary LVDS output. 16 CMOS 1400 1227 CMOS output. 17 GNDBUF 1389 1365 Ground, buffer circuitry. 18 OUTSEL1 1232 1365 Selector input to choose the selected output type (PECL, LVDS, CMOS). See the OUTPUT SELECTION AND ENABLE table on page 1. Internal pull up. 19 Reserved 1042 1365 Reserved for future use. 20 Not connected 854 1365 Not Connected. 21 VDD 659 1365 Power supply. 22 Optional VDD 559 1365 Optional Power supply. 23 VDD 459 1365 Power supply. 24 VDD 358 1365 Power supply. 25 OUTSEL0 194 1365 Selector input to choose the selected output type (PECL, LVDS, CMOS). See the OUTPUT SELECTION AND ENABLE table on page 1. Internal pull up. 26 XIN 109 1223 Crystal input. See Crystal Specifications on page 3. 27 XOUT 109 1017 Crystal output. See Crystal Specifications on page 3. 28 Not connected 109 858 Not Connected. 29 S2 109 646 Output Divide by Two selector pin, as presented on the OUTPUT FREQUENCY SELECTOR Table on page 1. Internal pull up. 30 OE_CTRL 109 397 Used to enable/disable the output(s). See Output Selection and Enable table on page 1. 31 Not connected 109 181 Not connected. Note: for optimal Phase Noise performance, it is recommended to bond all optional VDD and GND pads. |
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