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MH8S64BALD-6 Datasheet(PDF) 1 Page - Mitsubishi Electric Semiconductor |
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MH8S64BALD-6 Datasheet(HTML) 1 Page - Mitsubishi Electric Semiconductor |
1 / 40 page MITSUBISHI ELECTRIC 536,870,912-BIT ( 8,388,608-WORD BY 64-BIT ) Synchronous DYNAMIC RAM MH8S64BALD-6 MITSUBISHI LSIs 11/May. /1999 MIT-DS-0317-0.0 DESCRIPTION APPLICATION Main memory or graphic memory in computer systems PRELIMINARY Some of contents are subject to change without notice. 1 1pin 10pin 11pin 40pin 41pin 84pin 85pin 94pin 95pin 124pin 125pin 168pin The MH8S64BALD is 8388608 - word x 64-bit Synchronous DRAM module. This consist of eight industry standard 8M x 8 Synchronous DRAMs in TSOP. The TSOP on a card edge dual in-line package provides any application where high densities and large of quantities memory are required. This is a socket-type memory module ,suitable for easy interchange or addition of module. FEATURES Type name 5.4ns (CL = 3) MH8S64BALD-6 Utilizes industry standard 8M X 8 Synchronous DRAMs in TSOP package Single 3.3V +/- 0.3V supply Max.Clock frequency 133MHz Fully synchronous operation referenced to clock rising edge 4-bank operation controlled by BA0,BA1(Bank Address) /CAS latency -2/3(programmable,at buffer mode) LVTTL Interface Burst length 1/2/4/8/Full Page(programmable) Burst type- Sequential and interleave burst (programmable) Random column access Burst Write / Single Write(programmable) Auto precharge / All bank precharge controlled by A10 Auto refresh and Self refresh 4096 refresh cycles every 64ms Max. Frequency Access Time from CLK [component level] 133MHz |
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