AMI Semiconductor

Product Description

• Next-generation 0.15µm structured ASIC platform for high-

performance 1.5V ASICs and FPGA-to-ASIC conversions

• NRE and production cost savings

• Significant time-to-market advantages

• Drop-in replacement for cost-reducing Xilinx® Virtex™-II

and Virtex-II Pro and Altera® APEX-II and Stratix designs

• 511K to 4.8M ASIC gates

• 210MHz system, 500MHz local clock speeds

• Low power consumption

· 0.055µW/MHz/gate @ 1.575V

• 258Kbits to 4.8Mbits of block RAM memory

• 18Kbit initializable dual-port RAM blocks at speeds up

to 330MHz

• Up to 6.1Mbits of memory when 50 percent of the logic

sites are used for distributed memory

• Initializable distributed memory at speeds up to 210MHz

• Flexible I/O technology, any I/O standard assigned to any I/O pin

• Configurable signal, core and I/O power supply pin locations

• Supports LVTTL, LVCMOS, PCI33, PCI66, PCI-X 133, PCI-X 2.0, GTL/+, HSTL class 1, 2, 3, and 4, SSTL2 class 1 and 2,

LVPECL (input), and LVDS I/O standards

• 1.5V, 1.8V, 2.5V, and 3.3V capable I/O

• True 3.3V tolerance with no external resistor necessary

• Digital controlled impedance (DCI)

• Built-in dual data rate (DDR) support

• LVDS data rates to 1Gbps

• Up to 1360 user I/Os

• Comprehensive clock management circuitry

• Up to eight delay-locked loops (DLLs) and eight phase-locked loops (PLLs)

• Variety of package options

• Integrated high-fault coverage scan-test, memory BIST and JTAG

Key Features

Targeted at medium-density, high-speed, 1.5V ASIC

applications and high-density FPGA-to-ASIC conversions,

the XPressArray-II (XPA-II) 0.15µm structured ASIC is an

innovative next-generation technology platform that

reduces time-to-market for system-on-chip (SoC)

applications while delivering significant NRE and unit

cost savings.

XPA-II offers a true drop-in replacement for Xilinx

Virtex-II and Virtex-II Pro and Altera APEX-II and Stratix

FPGAs, making it the industry's lowest cost ASIC

conversion solution. The result is a simplified route to

cost reductions for OEMs looking to combine the

flexibility of FPGA prototyping with a path to ASICs for

final production.

Operating with system clock speeds up to 210MHz for

18x18 soft multipliers and local clocks up to 500MHz

and available in a variety of package options, XPA-II

0.15µm devices deliver high-performance, low power

ASIC solutions with densities to 4.8M ASIC gates.

Configurable memory ranges from 258Kbits to

4.8Mbits, which increases up to 6.1Mbits of memory

with the addition of distributed configurable memory,

assuming 50 percent of the logic sites are used for

memory.

Flexible

I/O

technology

includes

support

for

a

comprehensive array of common standards and

compatibility with 1.5V, 1.8V, 2.5V, and 3.3V I/O