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SN75176BDR Datasheet(PDF) 7 Page - Texas Instruments |
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SN75176BDR Datasheet(HTML) 7 Page - Texas Instruments |
7 / 21 page SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low- to high-level output VID = 0 to 3 V See Figure 6 21 35 ns tPHL Propagation delay time, high- to low-level output VID = 0 to 3 V, See Figure 6 23 35 ns tPZH Output enable time to high level See Figure 7 10 20 ns tPZL Output enable time to low level See Figure 7 12 20 ns tPHZ Output disable time from high level See Figure 7 20 35 ns tPLZ Output disable time from low level See Figure 7 17 25 ns PARAMETER MEASUREMENT INFORMATION Figure 1. Driver VOD and VOC 2 RL VOD2 VOC 2 RL Figure 2. Receiver VOH and VOL VID VOL VOH –IOH +IOL 3 V VOLTAGE WAVEFORMS tt(OD) td(OD) 1.5 V 10% tt(OD) ≈2.5 V ≈–2.5 V 90% 50% Output td(OD) 0 V 3 V 1.5 V Input TEST CIRCUIT Output CL = 50 pF (see Note A) 50 Ω RL = 54 Ω Generator (see Note B) 50% 10% NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. Figure 3. Driver Test Circuit and Voltage Waveforms |
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