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TDA8376 Datasheet(PDF) 6 Page - NXP Semiconductors |
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TDA8376 Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 44 page 1996 Jan 26 6 Philips Semiconductors Objective specification I2C-bus controlled PAL/NTSC TV processors TDA8376; TDA8376A 6 PINNING SYMBOL PIN DESCRIPTION SDIP52 QFP64 DECDIG 1 11 decoupling digital supply CBLK 2 12 black peak hold capacitor SCL 3 13 I2C-bus serial clock input SDA 4 14 I2C-bus serial data input/output DECBG 5 16 band gap decoupling CHROMA 6 17 chrominance input (S-VHS) CVBS/Y 7 18 external CVBS/Y input VP1 8 20 main supply voltage (+8 V) CVBSINT 9 22 internal CVBS input GND1 10 23 ground 1 PIPO 11 25 picture-in-picture output DECFT 12 26 decoupling filter tuning CVBSEXT 13 27 external CVBS input RGBIN2 14 28 RGB insertion input 2 RI2 15 29 red input 2 GI2 16 30 green input 2 BI2 17 31 blue input 2 BLKIN 18 32 black-current input BO 19 34 blue output GO 20 35 green output RO 21 36 red output BCLIN 22 37 beam current limiter input RI1 23 38 red input 1 GI1 24 39 green input 1 BI1 25 40 blue input 1 RGBIN1 26 41 RGB insertion input 1 LUMIN 27 42 luminance input LUMOUT 28 43 luminance output BYO 29 44 −(B−Y) signal output RYO 30 45 −(R−Y) signal output BYI 31 46 −(B−Y) signal input RYI 32 47 −(R−Y) signal input XTAL1 33 49 3.58 MHz crystal connection XTAL2 34 51 4.43/3.58 MHz crystal connection DET 35 53 loop filter phase detector SECref 36 54 SECAM reference output VP2 37 55 horizontal oscillator supply voltage (+8 V) CVBS/TXT 38 56 CVBS/TXT output |
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