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MPC508A Datasheet(PDF) 6 Page - Burr-Brown (TI) |
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MPC508A Datasheet(HTML) 6 Page - Burr-Brown (TI) |
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6 / 18 page  MPC508A, MPC509A 6 SBFS019A www.ti.com Source Node A C SB R SA Z CM Cd A Cd B C SA R SB R CMS C CMS Node B MPC509A Channel Rd A Rd B Load Load Source Node A C S R S R L C L MPC508A Channel Source Characteristics • The source impedance unbalance will produce offset, common-mode and channel-to-channel gain-scatter er- rors. Use sources which do not have large impedance unbalances if at all possible. • Keep source impedances as low as possible to minimize resistive loading errors. • Minimize ground loops. If signal lines are shielded, ground all shields to a common point at the system analog common. If the MPC509A is used for multiplexing high-level signals of ±1V to ±10V full-scale ranges, the foregoing precautions should still be taken, but the parameters are not as critical as for low-level signal applications. DYNAMIC CHARACTERISTICS Settling Time The gate-to-source and gate-to-drain capacitance of the CMOS FET switches, the RC time constants of the source and the load determine the settling time of the multiplexer. Governed by the charge transfer relation i = C (dV/dt), the charge currents transferred to both load and source by the analog switches are determined by the amplitude and rise time of the signal driving the CMOS FET switches and the gate-to-drain and gate-to-source junction capacitances as shown in Figures 3 and 4. Using this relationship, one can see that the amplitude of the switching transients, seen at the source and load, decrease proportionally as the capacitance of the load and source increase. The trade-off for reduced switching transient amplitude is increased settling time. In effect, the amplitude of the transients seen at the source and load are: dV L = (i/C) dt where i = C (dV/dt) of the CMOS FET switches C = load or source capacitance The source must then redistribute this charge, and the effect of source resistance on settling time is shown in the Typical Performance Curves. This graph shows the settling time for a 20V step change on the input. The settling time for smaller step changes on the input will be less than that shown in the curve. Switching Time This is the time required for the CMOS FET to turn ON after a new digital code has been applied to the Channel Address inputs. It is measured from the 50 percent point of the address input signal to the 90 percent point of the analog signal seen at the output for a 10V signal change between channels. Crosstalk Crosstalk is the amount of signal feedthrough from the three (MPC509A) or seven (MPC508A) OFF channels appearing at the multiplexer output. Crosstalk is caused by the voltage divider effect of the OFF channel, OFF resistance and junc- tion capacitances in series with the R ON and RS impedances of the ON channel. Crosstalk is measured with a 20Vp-p 1kHz sine wave applied to all OFF channels. The crosstalk for these multiplexers is shown in the Typical Performance Curves. Common-Mode Rejection (MPC509A Only) The matching properties of the load, multiplexer and source affect the common-mode rejection (CMR) capability of a differentially multiplexed system. CMR is the ability of the multiplexer and input amplifier to reject signals that are common to both inputs, and to pass on only the signal difference to the output. For the MPC509A, protection is provided for common-mode signals of ±20V above the power supply voltages with no damage to the analog switches. The CMR of the MPC509A and Burr-Brown’s INA110 instrumentation amplifier is 110dB at DC to 10Hz (G = 100) with a 6dB/octave roll off to 70dB at 1000Hz. This measure- ment of CMR is shown in the Typical Performance Curves and is made with a Burr-Brown model INA110 instrumenta- tion amplifier connected for gains of 10, 100, and 500. FIGURE 3. Settling Time Effects—MPC508A FIGURE 4. Settling and Common-Mode-Effects— MPC509A |
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Similar Description - MPC508A |
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