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TDA8753A Datasheet(PDF) 2 Page - NXP Semiconductors

Part # TDA8753A
Description  YUV 8-bit analog-to-digital interface
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA8753A Datasheet(HTML) 2 Page - NXP Semiconductors

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1996 Jan 12
2
Philips Semiconductors
Product specification
YUV 8-bit analog-to-digital interface
TDA8753A
FEATURES
• Triple analog-to-digital converter
• 8-bit resolution
• Sampling rate up to 20 MHz
• Power dissipation of 500 mW (typical)
• Internal clamp functions
• 4:1:1 output data encoder
• Y binary output
• U, V two's complement outputs
• Sample rate converter permits programmable horizontal
compression factors from 1 to 2
• Serial microcontroller interface
• TTL compatible inputs.
APPLICATIONS
• High-speed analog-to-digital conversion for video signal
digitizing in 4 :1:1 format
• 100 Hz improved definition TV for all formats
(4/3, 16/9, 14/9 etc.).
GENERAL DESCRIPTION
The TDA8753A is a monolithic CMOS 8-bit video
low-power analog-to-digital conversion interface for YUV
signals. It converts the YUV analog input signal into 8-bit
binary coded digital words in format 4 :1:1 at a sampling
rate of 20 MHz. All analog signal inputs are clamped.
The device includes a digital sample rate converter for
variable compression with a factor 1 to 2.
QUICK REFERENCE DATA
Notes
1. The signal-to-noise ratio without harmonics is measured using a 16 MHz clock frequency. This value is given for a
4.43 MHz input frequency on the Y channel (1.5 MHz on the U and V channels).
2. The external resistor (between VDDA and Iref) fixing internal static currents influences Ptot. The value of the resistor
should be 5.6 k
Ω (5%).
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDDA
analog supply voltage
4.75
5.0
5.25
V
VDDD
digital supply voltage
4.75
5.0
5.25
V
IDDA
analog supply current
55
63
mA
IDDD
digital supply current
45
55
mA
INL
integral non-linearity
fclk = 16 MHz; ramp input
−±0.75
LSB
DLE
differential non-linearity
fclk = 16 MHz; ramp input; Y
−±0.5
0.75
LSB
fclk = 16 MHz; ramp input; U and V
−±0.6
±0.9
LSB
SNR
signal-to-noise ratio
without harmonics
note 1
43
−−
dB
fclk
maximum conversion
rate
20
−−
MHz
Ptot
total power dissipation
note 2
500
650
mW
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA8753A
SDIP42
plastic shrink dual in-line package; 42 leads (600 mil)
SOT270-1


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